arm_pmu: ACPI support
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Cover letter [PATCHv3 00/14] arm_pmu: ACPI support
Quoted 22 lines · Mark Rutland
Hi,
This series implements ACPI support in the ARM PMU code. It borrows some code from Jeremy's series [1], but takes a different approach to probing and association, using the usual hotplug state machine, minimising external changes required, and simplifying the relationship with the common
arm_pmucode.The first few patches are preparatory cleanup/refactoring, with the latter half of the series being specific to ACPI support.
The series is based on Will's perf/updates branch [2]. I've pushed the whole series out to the arm/perf/acpi branch [3] of my kernel.org repo.
Due to the innards of the hotplug callback framework, it's not entirely safe to register a PMU in a hotplug callback. Due to this, we can only associated hotplugged CPUs with a PMU if a matching CPU was around at probe time. A similar restriction already applies to DT systems. We may be able to relax this with some future work.
I've given this some testing on a Juno platform (using SPIs). To see that IRQs are correctly associated, I've tested with the following:
Quoted 8 lines
$ taskset -c ${SOME_CPU_HERE} perf record \ -e armv8_pmuv3_0/cpu_cycles/ \ -e armv8_pmuv3_1/cpu_cycles/ \ cat /proc/interruptsI've also booted with
nr_cpustemporarily capped (passing maxcpus=) to test the association logic. This has also been tested in a VM using PPIs; I do not have access to a host machine which itself uses PPIs.
I have tried these patches on a Hisilicon D03 board.
The perf list, basic perf events and perf fuzzer results are all fine.
'perf list' on Hisilicon D03
--------------------------------
L1-dcache-load-misses [Hardware cache event] L1-dcache-loads [Hardware cache event] L1-dcache-store-misses [Hardware cache event] L1-dcache-stores [Hardware cache event] L1-icache-load-misses [Hardware cache event] L1-icache-loads [Hardware cache event] branch-load-misses [Hardware cache event] branch-loads [Hardware cache event] dTLB-load-misses [Hardware cache event] iTLB-load-misses [Hardware cache event]
armv8_pmuv3_0/br_mis_pred/ [Kernel PMU event] armv8_pmuv3_0/br_pred/ [Kernel PMU event] armv8_pmuv3_0/bus_access/ [Kernel PMU event] armv8_pmuv3_0/bus_cycles/ [Kernel PMU event] armv8_pmuv3_0/cid_write_retired/ [Kernel PMU event] armv8_pmuv3_0/cpu_cycles/ [Kernel PMU event] armv8_pmuv3_0/exc_return/ [Kernel PMU event] armv8_pmuv3_0/exc_taken/ [Kernel PMU event] armv8_pmuv3_0/inst_retired/ [Kernel PMU event] armv8_pmuv3_0/inst_spec/ [Kernel PMU event] armv8_pmuv3_0/l1d_cache/ [Kernel PMU event] armv8_pmuv3_0/l1d_cache_refill/ [Kernel PMU event] armv8_pmuv3_0/l1d_cache_wb/ [Kernel PMU event] armv8_pmuv3_0/l1d_tlb_refill/ [Kernel PMU event] armv8_pmuv3_0/l1i_cache/ [Kernel PMU event] armv8_pmuv3_0/l1i_cache_refill/ [Kernel PMU event] armv8_pmuv3_0/l1i_tlb_refill/ [Kernel PMU event] armv8_pmuv3_0/l2d_cache/ [Kernel PMU event] armv8_pmuv3_0/l2d_cache_refill/ [Kernel PMU event] armv8_pmuv3_0/l2d_cache_wb/ [Kernel PMU event] armv8_pmuv3_0/mem_access/ [Kernel PMU event] armv8_pmuv3_0/memory_error/ [Kernel PMU event] armv8_pmuv3_0/sw_incr/ [Kernel PMU event] armv8_pmuv3_0/ttbr_write_retired/ [Kernel PMU event]
Thanks,
Anurup
Quoted 50 lines
Since v1 [4]:
* Fix up ACPI bits per Lorenzo's request
* Accumulate tags
* Check presence of PMUv3Since v2 [5]:
* Clean up GSIs when a request fails
* Rename parse/unparse functions
* Usecpuid_feature_extract_unsigned_field()for PMUVer
* Drop parking protocol cleanups. I'll resend these later.Thanks,
Mark.[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/482397.html
[2]git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.gitperf/updates
[3]git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.gitarm/perf/acpi
[4] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-March/492897.html
[5] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-April/499982.htmlMark Rutland (14):
drivers/perf:arm_pmu: remove pointless PMU disablingdrivers/perf:arm_pmu: definearmpmu_init_fndrivers/perf:arm_pmu: fold init into allocdrivers/perf:arm_pmu: factor out pmu registrationdrivers/perf:arm_pmu: simplifycpu_pmu_request_irqs()drivers/perf:arm_pmu: handle noplatform_devicedrivers/perf:arm_pmu: rename irq request/free functionsdrivers/perf:arm_pmu: split cpu-local irq request/freedrivers/perf:arm_pmu: move irq request/free into probedrivers/perf:arm_pmu: split out platform device probe logic
arm64: add function to get a cpu's MADT GICC tabledrivers/perf:arm_pmu: add ACPI framework
arm64: pmuv3: handle !PMUv3 when probing
arm64: pmuv3: usearm_pmuACPI frameworkarch/arm64/include/asm/acpi.h | 2 + arch/arm64/kernel/perf_event.c | 113 ++++++++---- arch/arm64/kernel/smp.c | 10 ++ drivers/perf/Kconfig | 4 + drivers/perf/Makefile | 3 +- drivers/perf/arm_pmu.c | 387 ++++++++++------------------------------ drivers/perf/arm_pmu_acpi.c | 256 ++++++++++++++++++++++++++ drivers/perf/arm_pmu_platform.c | 235 ++++++++++++++++++++++++ include/linux/cpuhotplug.h | 1 + include/linux/perf/arm_pmu.h | 22 ++- 10 files changed, 708 insertions(+), 325 deletions(-)create mode 100644
drivers/perf/arm_pmu_acpi.ccreate mode 100644drivers/perf/arm_pmu_platform.c