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OMAP3: PM: Fixes for low power code

Kevin Hilman linux-arm-kernel linux-omap 2 versions – New

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  1. v2 Latest0 of 5 patches 0 repliesNew
  2. v10 of 6 patches 0 repliesSuperseded

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None of the 5 patches the cover letter announces are in this archive.

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Cover letter [PATCH v2 0/5] OMAP3: PM: Fixes for low power code
Quoted 7 lines · Santosh Shilimkar

The series does below fixes to the omap3 low power code.
1. Use supported ARMv7 instructions instead of the legacy ones
2. Fix the MMU on sequence
3. Fix the cache flush scenario when only L1 lost.
4. Remove all un-necessary context save registers
5. Disable C-bit before cache clean

Quoted 5 lines

V2:
- Rebased series on top of pm-core branch where the Dave Martin's Thumb2 patches are merged.
- Dropped set_cr() patch since it's already merged in pm-core branch
- Fixed the hang issue reported by Kevin Hilman with OMAP3630

Thanks for the updates.

I've been testing the previous series along with Paul's integration branch and things look good.

Will re-test with this updated version and queue for 2.6.39 (branch:
for_2.6.39/pm-misc)

Thanks,

Kevin

Quoted 24 lines

It's generated against latest pm-core branch and tested suspend and cpuilde on OMAP3630 ZOOM.

The following changes since commit 7d6d079fbd46aee85e9b5de1d67de15b85e50b04:
Kevin Hilman (1):
Merge branch 'for_2.6.39/pm-voltage' into pm-reset

are available in the git repository at:

git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base.git
pm-core-omap3-asm_v2

Santosh Shilimkar (5):
OMAP3: PM: Use ARMv7 supported instructions instead of legacy CP15
ones
OMAP3: PM: Fix the MMU on sequence in the asm code
OMAP3: PM: Allow the cache clean when L1 is lost.
OMAP3: PM: Remove un-necessary cp15 registers form low power cpu
context
OMAP3: PM: Clear the SCTLR C bit in asm code to prevent data cache
allocation

 arch/arm/mach-omap2/sleep34xx.S |  224 +++++++++++++++------------------------
 1 files changed, 85 insertions(+), 139 deletions(-)

Read the cover letter in its thread