Skip to content

ARM: l2c: remove outer_inv_all() method

Russell King linux-arm-kernel linux-devicetree linux-omap linux-samsung-soc linux-sh linux-tegra 1 version New

Get series with b4
b4 am [email protected]

Versions newest first

  1. v1 Latest75 patches 0 repliesNew

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/75ARM: l2c: remove outer_inv_all() methodarch/arm/include/asm/outercache.h arch/arm/mm/cache-feroceon-l2.c arch/arm/mm/cache-l2x0.c+0 -140 replies
2/75ARM: l2c: remove unnecessary call to outer_flush_all()arch/arm/mach-prima2/pm.c+0 -10 replies
3/75ARM: l2c: avoid calling outer_flush_all() unnecessarily (Spear)arch/arm/mach-spear/platsmp.c+14 -50 replies
4/75ARM: l2c: omap2: remove ES1.0 supportarch/arm/mach-omap2/omap4-common.c+8 -171 reply
5/75ARM: l2c: remove unnecessary UL-suffix to mask valuesarch/arm/mach-highbank/highbank.c arch/arm/mach-imx/mach-vf610.c arch/arm/mach-imx/system.c +3 more+6 -62 replies
6/75ARM: outer cache: add documentation of outer cache functionsarch/arm/include/asm/outercache.h+47 -12 replies
7/75ARM: outer cache: add WARN_ON() to outer_disable()arch/arm/include/asm/outercache.h arch/arm/mm/Makefile arch/arm/mm/l2c-common.c+23 -50 replies
8/75ARM: l2c: add helper for L2 cache controller DT IDsarch/arm/mm/cache-l2x0.c+10 -130 replies
9/75ARM: l2c: tidy up l2x0_of_data declarationsarch/arm/mm/cache-l2x0.c+14 -160 replies
10/75ARM: l2c: rename OF specific things, making l2x0_of_data available to allarch/arm/mm/cache-l2x0.c+32 -320 replies
11/75ARM: l2c: provide generic function for calling set_debug methodarch/arm/mm/cache-l2x0.c+11 -10 replies
12/75ARM: l2c: split out cache unlock codearch/arm/mm/cache-l2x0.c+16 -70 replies
13/75ARM: l2c: provide generic helper for way-based operationsarch/arm/mm/cache-l2x0.c+9 -60 replies
14/75ARM: l2c: rename cache_wait_way()arch/arm/mm/cache-l2x0.c+3 -30 replies
15/75ARM: l2c: add and use L2C revision constantsarch/arm/include/asm/hardware/cache-l2x0.h arch/arm/mm/cache-l2x0.c+21 -112 replies
16/75ARM: l2c: clean up OF initialisation a bitarch/arm/mm/cache-l2x0.c+40 -260 replies
17/75ARM: l2c: pass iomem address into data->save functionarch/arm/mm/cache-l2x0.c+16 -160 replies
18/75ARM: l2c: move l2c save function to __l2c_init()arch/arm/mm/cache-l2x0.c+7 -30 replies
19/75ARM: l2c: group implementation specific code togetherarch/arm/mm/cache-l2x0.c+251 -2510 replies
20/75ARM: l2c: provide enable methodarch/arm/mm/cache-l2x0.c+62 -180 replies
21/75ARM: l2c: write auxctrl register before unlockingarch/arm/mm/cache-l2x0.c+5 -50 replies
22/75ARM: l2c: only write the auxiliary control register if requiredarch/arm/mm/cache-l2x0.c+3 -10 replies
23/75ARM: l2c: move aurora broadcast setup to enable functionarch/arm/mm/cache-l2x0.c+15 -130 replies
24/75ARM: l2c: implement fixups for L2 cache controller quirks/errataarch/arm/mm/cache-l2x0.c+101 -110 replies
25/75ARM: l2c: clean up L2 cache initialisation messagesarch/arm/mm/cache-l2x0.c+4 -30 replies
26/75ARM: l2c: move and add ARM L2C-2x0/L2C-310 save/resume code to non-OFarch/arm/mm/cache-l2x0.c+77 -740 replies
27/75ARM: l2c: clean up save/resume functionsarch/arm/mm/cache-l2x0.c+52 -570 replies
28/75ARM: l2c: simplify l2x0 unlocking codearch/arm/mm/cache-l2x0.c+8 -170 replies
29/75ARM: l2c: move pl310_set_debug() into l2c-310 codearch/arm/mm/cache-l2x0.c+6 -80 replies
30/75ARM: l2c: add L2C-210 specific handlersarch/arm/mm/cache-l2x0.c+122 -10 replies
31/75ARM: l2c: implement L2C-310 erratum 727915 as a method overridearch/arm/mm/cache-l2x0.c+20 -00 replies
32/75ARM: l2c: implement L2C-310 erratum 588369 as a method overridearch/arm/mm/cache-l2x0.c+69 -02 replies
33/75ARM: l2c: use L2C-210 handlers for L2C-310 errata-less implementationsarch/arm/mm/cache-l2x0.c+36 -220 replies
34/75ARM: l2c: add L2C-220 specific handlersarch/arm/mm/cache-l2x0.c+157 -100 replies
35/75ARM: l2c: convert Broadcom L2C-310 to new codearch/arm/mm/cache-l2x0.c+11 -160 replies
36/75ARM: l2c: remove obsolete l2x0 ops for non-OF initarch/arm/mm/cache-l2x0.c+0 -2060 replies
37/75ARM: l2c: move type string into l2c_init_data structurearch/arm/mm/cache-l2x0.c+13 -70 replies
38/75ARM: l2c: add decode for L2C-220 cache waysarch/arm/mm/cache-l2x0.c+1 -00 replies
39/75ARM: l2c: move way size calculation data into l2c_init_dataarch/arm/mm/cache-l2x0.c+20 -90 replies
40/75ARM: l2c: move errata configuration options to arch/arm/mm/Kconfigarch/arm/Kconfig arch/arm/mm/Kconfig+51 -510 replies
41/75ARM: l2c: provide generic hook to intercept writes to secure registersarch/arm/include/asm/outercache.h arch/arm/mm/cache-l2x0.c+34 -112 replies
42/75ARM: l2c: omap2: implement new write_sec methodarch/arm/mach-omap2/omap4-common.c+26 -161 reply
43/75ARM: l2c: omap2: remove explicit SMI calls to enable L2 cachearch/arm/mach-omap2/omap4-common.c+0 -51 reply
44/75ARM: l2c: highbank: implement new write_sec methodarch/arm/mach-highbank/highbank.c+7 -50 replies
45/75ARM: l2c: highbank: remove explicit SMI call in L2 cache initialisationarch/arm/mach-highbank/highbank.c+1 -30 replies
46/75ARM: l2c: ux500: implement dummy write_sec methodarch/arm/mach-ux500/cache-l2x0.c+10 -91 reply
47/75ARM: l2c: remove old .set_debug methodarch/arm/include/asm/outercache.h arch/arm/mm/cache-l2x0.c+2 -200 replies
48/75ARM: l2c: implement L2C-310 erratum 752271 in core L2C codearch/arm/mm/cache-l2x0.c+17 -10 replies
49/75ARM: l2c: fix register namingarch/arm/include/asm/hardware/cache-l2x0.h arch/arm/mach-cns3xxx/core.c arch/arm/mach-imx/system.c +11 more+118 -956 replies
50/75ARM: l2c: add automatic enable of early BRESParch/arm/mm/cache-l2x0.c+22 -30 replies
51/75ARM: l2c: remove platforms/SoCs setting early BRESParch/arm/mach-berlin/berlin.c arch/arm/mach-exynos/common.c arch/arm/mach-omap2/omap4-common.c +8 more+19 -201 reply
52/75ARM: l2c: tegra: remove associativity and way size from aux_ctrlarch/arm/mach-tegra/tegra.c+1 -170 replies
53/75ARM: l2c: ux500: remove associativity and way size from aux_ctrlarch/arm/mach-ux500/cache-l2x0.c+2 -131 reply
54/75ARM: l2c: ux500: don't try to change the L2 cache auxiliary control registerarch/arm/mach-ux500/cache-l2x0.c+2 -21 reply
55/75ARM: l2c: cns3xxx: remove cache size overridearch/arm/mach-cns3xxx/core.c+1 -10 replies
56/75ARM: l2c: exynos: remove cache size overridearch/arm/mach-exynos/common.c+1 -40 replies
57/75ARM: l2c: nomadik: remove cache size overridearch/arm/mach-nomadik/cpu-8815.c+1 -11 reply
58/75ARM: l2c: omap2: remove cache size overridearch/arm/mach-omap2/omap4-common.c+3 -54 replies
59/75ARM: l2c: prima2: remove cache size overridearch/arm/boot/dts/marco.dtsi arch/arm/boot/dts/prima2.dtsi arch/arm/mach-prima2/l2x0.c+3 -353 replies
60/75ARM: l2c: shmobile: remove cache size overridearch/arm/mach-shmobile/board-armadillo800eva-reference.c arch/arm/mach-shmobile/board-armadillo800eva.c arch/arm/mach-shmobile/board-kzm9g-reference.c +3 more+6 -60 replies
61/75ARM: l2c: spear13xx: remove cache size overridearch/arm/mach-spear/spear13xx.c+1 -10 replies
62/75ARM: l2c: sti: remove cache size overridearch/arm/mach-sti/board-dt.c+3 -91 reply
63/75ARM: l2c: zynq: remove cache size overridearch/arm/mach-zynq/common.c+1 -17 replies
64/75ARM: l2c: realview: improve commentry about the L2 cache requirementsarch/arm/mach-realview/realview_eb.c arch/arm/mach-realview/realview_pb1176.c arch/arm/mach-realview/realview_pb11mp.c+21 -50 replies
65/75ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of thisarch/arm/include/asm/hardware/cache-l2x0.h+0 -10 replies
66/75ARM: l2c: print a warning with L2C-310 caches if the cache size is modifiedarch/arm/mm/cache-l2x0.c+2 -00 replies
67/75ARM: l2c: vexpress ca9x4: move L2 cache initialisation earlierarch/arm/mach-vexpress/ct-ca9x4.c+18 -100 replies
68/75ARM: l2c: add L2C-310 power control DT propertiesDocumentation/devicetree/bindings/arm/l2cc.txt arch/arm/boot/dts/imx6qdl.dtsi arch/arm/boot/dts/imx6sl.dtsi +1 more+16 -00 replies
69/75ARM: l2c: check that DT files specify the required "cache-unified" propertyarch/arm/mm/cache-l2x0.c+4 -00 replies
70/75ARM: l2c: add warnings for stuff modifying aux_ctrl register valuesarch/arm/mm/cache-l2x0.c+23 -40 replies
71/75ARM: l2c: permit flush_all() on large flush_range() XXX Needs more thought XXXarch/arm/mm/cache-l2x0.c+79 -110 replies
72/75ARM: l2c: trial at enabling some Cortex-A9 optimisationsarch/arm/include/asm/hardware/cache-l2x0.h arch/arm/mm/cache-l2x0.c+59 -00 replies
73/75ARM: l2c: move L2 cache register saving to a more sensible locationarch/arm/mm/cache-l2x0.c+9 -127 replies
74/75ARM: l2c: always enable low power modesDocumentation/devicetree/bindings/arm/l2cc.txt arch/arm/mm/cache-l2x0.c+12 -125 replies
75/75ARM: l2c: imx: remove direct write to power control registerarch/arm/mach-imx/system.c+0 -23 replies

Reviews trailers per patch

12 of 75 patches have a Reviewed-by or Acked-by.

PatchTony LindgrenMaxime CoquelinLinus WalleijStephen WarrenShawn Guo
1/75
2/75
3/75
4/75A-b
5/75
6/75
7/75
8/75
9/75
10/75
11/75
12/75
13/75
14/75
15/75
16/75
17/75
18/75
19/75
20/75
21/75
22/75
23/75
24/75
25/75
26/75
27/75
28/75
29/75
30/75
31/75
32/75
33/75
34/75
35/75
36/75
37/75
38/75
39/75
40/75
41/75
42/75A-b
43/75A-b
44/75
45/75
46/75A-b
47/75
48/75
49/75A-b A-b A-b A-b
50/75
51/75A-b
52/75
53/75A-b
54/75A-b
55/75
56/75
57/75A-b
58/75A-b
59/75
60/75
61/75
62/75
63/75
64/75
65/75
66/75
67/75
68/75
69/75
70/75
71/75
72/75
73/75T-b A-b T-b
74/75
75/75A-b

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 5 reviewers.

Read the v1 thread