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net/designware: fixes for data cache, phylib and burst size

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  1. v3 Latest0 of 5 patches 0 repliesNew

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None of the 5 patches the cover letter announces are in this archive.

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Cover letter [U-Boot] [PATCH v3 0/5] net/designware: fixes for data cache, phylib and burst size

Hi Ian,

Quoted 24 lines · Ian Campbell

Pulling together various fixes for designware into a single series. I'm calling this v3, although some of these never had a v2.

Most of these have been floating around for a few weeks, the cache line issues in particular mean that the driver is unlikely to work on any ARM system. I've been testing these on top of my sunxi mainlining series.

I've also thrown them onto gitorious. Pull-request details are below.

Thanks,
Ian.

The following changes since commit dda0dbfc69f3d560c87f5be85f127ed862ea6721:

Prepare v2014.04 (2014-04-14 15:19:24 -0400)

are available in the git repository at:

git://gitorious.org/ijc/u-boot.git designware

for you to fetch changes up to 5e3e5c37bc7a867ca42fa43f69ad764c8942b631:

net/designware: Make DMA burst length configurable and reduce by default (2014-05-08 22:16:33 +0100)

Quoted 7 lines

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Ian Campbell (5):
net/designware: call phy_connect_dev() to properly setup phylib device net/designware: ensure device private data is DMA aligned. net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGN net/designware: reorder struct dw_eth_dev to pack more efficiently. net/designware: Make DMA burst length configurable and reduce by default

1/5 was already applied by Tom (but still assigned to me on Patchwork).

2/5 to 5/5 (with v3.1 of 4/5) applied to u-boot-arm/master, thanks!

Amicalement,

Signature · 1 line
Albert.

Read the cover letter in its thread