target-alpha: fpu qualifiers, round 2
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- v1 Latest5 of 6 patches 10 repliesIn review
5 of 6 patches are in this archive. The cover letter announces 6.
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 2/6 | target-alpha: Split up FPCR value into separate fields.fpu/ target-alpha/ target-alpha/ | +128 | 0 replies | |
| 3/6 | target-alpha: Reduce internal processor registers for user-mode.linux-user/ target-alpha/ target-alpha/ | +34 | 5 replies | |
| 4/6 | target-alpha: Clean up arithmetic traps.target-alpha/ target-alpha/ | +13 | 0 replies | |
| 5/6 | target-alpha: Mark helper_excp as NORETURN.target-alpha/ | +1 | 0 replies | |
| 6/6 | target-alpha: Implement IEEE FP qualifiers.target-alpha/ target-alpha/ target-alpha/ | +688 | 0 replies |
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Cover letter [Qemu-devel] [PATCH 0/6] target-alpha: fpu qualifiers, round 2
I've split up the FPCR as requested by Aurelien. We no longer set anything in FP_STATUS after the execution of the operation, only copy data from FP_STATUS to some env->fpcr field.
I have totally rewritten the patch to be more along the line that Laurent was suggesting, in that the rounding mode and other qualifiers are totally parsed within the translator. I no longer pass the FN11 field to the helper functions.
Unlike Laurent's prototype, I do not set the rounding mode at every FP instruction; I remember the previous setting of the rounding mode within a TB. Similarly for the flush-to-zero field.
I do not handle VAX instructions at all. The existing VAX support is mostly broken, and I didn't feel like compounding the problem.
r~
--
Richard Henderson (6):
target-alpha: Fix gdb access to fpcr and unique.
target-alpha: Split up FPCR value into separate fields.
target-alpha: Reduce internal processor registers for user-mode.
target-alpha: Clean up arithmetic traps.
target-alpha: Mark helper_excp as NORETURN.
target-alpha: Implement IEEE FP qualifiers.