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target-alpha: fpu qualifiers, round 2

Richard Henderson qemu-devel 1 version In review

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  1. v1 Latest5 of 6 patches 10 repliesIn review

5 of 6 patches are in this archive. The cover letter announces 6.

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
2/6target-alpha: Split up FPCR value into separate fields.fpu/softfloat.h target-alpha/cpu.h target-alpha/helper.c+128 -580 replies
3/6target-alpha: Reduce internal processor registers for user-mode.linux-user/main.c target-alpha/cpu.h target-alpha/translate.c+34 -215 replies
4/6target-alpha: Clean up arithmetic traps.target-alpha/cpu.h target-alpha/op_helper.c+13 -90 replies
5/6target-alpha: Mark helper_excp as NORETURN.target-alpha/op_helper.c+1 -10 replies
6/6target-alpha: Implement IEEE FP qualifiers.target-alpha/helper.h target-alpha/op_helper.c target-alpha/translate.c+688 -1150 replies

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Cover letter [Qemu-devel] [PATCH 0/6] target-alpha: fpu qualifiers, round 2

I've split up the FPCR as requested by Aurelien. We no longer set anything in FP_STATUS after the execution of the operation, only copy data from FP_STATUS to some env->fpcr field.

I have totally rewritten the patch to be more along the line that Laurent was suggesting, in that the rounding mode and other qualifiers are totally parsed within the translator. I no longer pass the FN11 field to the helper functions.

Unlike Laurent's prototype, I do not set the rounding mode at every FP instruction; I remember the previous setting of the rounding mode within a TB. Similarly for the flush-to-zero field.

I do not handle VAX instructions at all. The existing VAX support is mostly broken, and I didn't feel like compounding the problem.

r~

--
Richard Henderson (6):
target-alpha: Fix gdb access to fpcr and unique.
target-alpha: Split up FPCR value into separate fields.
target-alpha: Reduce internal processor registers for user-mode.
target-alpha: Clean up arithmetic traps.
target-alpha: Mark helper_excp as NORETURN.
target-alpha: Implement IEEE FP qualifiers.