Skip to content

tcg-sparc improvements

Richard Henderson qemu-devel 1 version Applied

Status from this message: Thanks, applied all (4/5 with your fix).

Get series with b4
b4 am [email protected]

Versions newest first

  1. v1 Latest5 patches 3 repliesApplied

Patches in v1 Applied

#Subject and filesSizeRepliesApplied
1/5tcg-sparc: Add tcg_out_arithc.tcg/sparc/tcg-target.c+43 -430 replies
2/5tcg-sparc: Implement add2, sub2, mulu2.tcg/sparc/tcg-target.c+27 -00 replies
3/5tcg-sparc: Do not remove %o[012] from 'r' constraint.tcg/sparc/tcg-target.c+3 -00 replies
4/5tcg-sparc: Implement division properly.tcg/sparc/tcg-target.c tcg/sparc/tcg-target.h+55 -301 reply
5/5tcg-sparc: Implement ext32[su]_i64tcg/sparc/tcg-target.c tcg/sparc/tcg-target.h+21 -00 replies

Reviews trailers per patch

No Reviewed-by, Acked-by or Tested-by trailers for v1 yet.

Read the v1 thread

Cover letter [Qemu-devel] [PATCH 0/5] tcg-sparc improvements

As noticed elsewhere on the list mulu2_i32 is missing. Which led me to notice that add2_i32 and sub2_i32 were also missing and also led me to notice that division was incorrectly implemented.

My initial implementation of 32-bit division copied the existing practice of using the 64-bit division insns for sparcv9, with proper sign/zero extensions on the input operands. But that required extra temporaries and quickly got ugly. In the end I thought it was clearer to simply use the 32-bit division insns unconditionally.

That excercise, however, made me notice that 32-bit extension was not special-cased, leading to the final patch.

r~

Richard Henderson (5):
tcg-sparc: Add tcg_out_arithc.
tcg-sparc: Implement add2, sub2, mulu2.
tcg-sparc: Do not remove %o[012] from 'r' constraint.
tcg-sparc: Implement division properly.
tcg-sparc: Implement ext32[su]_i64

 tcg/sparc/tcg-target.c |  206 ++++++++++++++++++++++++++++++++----------------
 tcg/sparc/tcg-target.h |    8 ++
 2 files changed, 145 insertions(+), 69 deletions(-)