Add Q35 base support

Hi,

These patches are intened to give us a base set of patches for Q35 upon which to build. The major change in this series is to add the memory controller hub, or 'mch' as proper member of the q35 host structure. This change refactors the code a bit, and moves more intialization out of pc_q35.c and into q35.c. We probably could go further and introduce a generic north bridge class and make the 'mch' a child of it, but I'm not proposing that kind of change this late in the development cycle.

I've also dropped as many non-essential bits as possible, such as if=ahci from the patch series. Patches 13-14 allow the use of the '-L' option to specify the directory of the q35 dsdt table. These aren't strictly necessary. As one could pass:

-bios /root/seabios/seabios/out/bios.bin -acpitable file=/root/seabios/seabios/out/q35-acpi-dsdt.aml

But its rather cumbersome, and including the automatic load of the dsdt table, is the future direction. That is, once the seabios bits are included we can pull the q35 dsdt table into the qemu tree, and avoid extra options altogether.

Testing:

I've booted f16, f17, Windows7, Windows 8. (BSDs and Win xp work with a piix3-ide controller). And Gabriel Somlo has reported success with Mac OS X. I'm also going to look at writing qtest cases.

Thanks,

-Jason

Git trees:

git://github.com/jibaron/q35-qemu.git
git://github.com/jibaron/q35-seabios.git

Todo:

-add ahci migration back (need to cover more fields, but basically works) -add ACPI hotplug support (pcie hotplug is currently working) -add qtest test cases

Changes from v3:
-Compose 'mch' as part of the q35 host strucuture -cleanup naming
-drop if=ahci

Changes from v2:
-Patch restructure (broke out ich9 chips + data structures separately) -added passthrough support
-add support for -usb to fill out host pci bus
-Dropped automatic load of dsdt table for piix
-cleanups
-dropped wmask on smbus (mst)
-sparse host bus

Changes from v1:
-Updated end of low mem from 0xe0000000 -> 0xb0000000 (Gerd Hoffmann)

        -so 0xb000000-0xc000000 is memconfig
        -0xc000000-0xfec00000 is 32-bit pci window

-style/various cleanups
-introduced IF_AHCI
-introduced mach_if
-split dsdt out of bios, now passed for piix4 as well (Paolo, Gerd) -Removed add opaque argument to pci_map_irq_fn (Michael S. Tsirkin) -removed patches that were merged in v1

Isaku Yamahata (3):
pc, pc_piix: split out pc nic initialization
pc/piix_pci: factor out smram/pam logic
q35: Introduce q35 pc based chipset emulator

Jan Kiszka (3):
q35: Suppress SMM BIOS initialization under KVM
q35: Fix non-PCI IRQ processing in ich9_lpc_update_apic
q35: Add kvmclock support

Jason Baron (8):
pc: Move ioapic_init() from pc_piix.c to pc.c
pc_piix: Move kvm irq routing functions out of pc_piix.c
ich9: Add acpi support and definitions
ich9: Add the lpc chip
ich9: Add smbus
ich9: Add i82801b11 dmi-to-pci bridge
Add a fallback bios file search, if -L fails.
q35: automatically load the q35 dsdt table

 hw/Makefile.objs      |    3 +
 hw/acpi_ich9.c        |  322 ++++++++++++++++++++++++++++++
 hw/acpi_ich9.h        |   47 +++++
 hw/i386/Makefile.objs |    1 +
 hw/i82801b11.c        |  125 ++++++++++++
 hw/ich9.h             |  207 +++++++++++++++++++
 hw/kvm/ioapic.c       |   40 ++++
 hw/lpc_ich9.c         |  525 +++++++++++++++++++++++++++++++++++++++++++++++++
 hw/pam.c              |   87 ++++++++
 hw/pam.h              |   97 +++++++++
 hw/pc.c               |   58 ++++++
 hw/pc.h               |    5 +
 hw/pc_piix.c          |   79 +-------
 hw/pc_q35.c           |  230 +++++++++++++++++++++
 hw/pci_ids.h          |   14 ++
 hw/piix_pci.c         |   68 ++-----
 hw/q35.c              |  309 +++++++++++++++++++++++++++++
 hw/q35.h              |  150 ++++++++++++++
 hw/smbus_ich9.c       |  159 +++++++++++++++
 kvm.h                 |    2 +
 vl.c                  |   36 +++-
 21 files changed, 2425 insertions(+), 139 deletions(-)
 create mode 100644 hw/acpi_ich9.c
 create mode 100644 hw/acpi_ich9.h
 create mode 100644 hw/i82801b11.c
 create mode 100644 hw/ich9.h
 create mode 100644 hw/lpc_ich9.c
 create mode 100644 hw/pam.c
 create mode 100644 hw/pam.h
 create mode 100644 hw/pc_q35.c
 create mode 100644 hw/q35.c
 create mode 100644 hw/q35.h
 create mode 100644 hw/smbus_ich9.c