Reset and Halting modifications + Zynq SMP
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v5 Latest5 patches 9 repliesIn review
- v43 patches 6 repliesSuperseded
- v1 RFC7 patches 5 repliesSuperseded
Changes in v5 from the cover letter
Convert to GPIO scheme
Implemented custom secondary cpu reset
OCM Macro cleanup
Patches in v5 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/5 | arm: zynq: Macroify OCM Base and Sizehw/ | +5 | 1 reply | |
| 2/5 | arm: zynq: added SMP supporthw/ | +59 | 1 reply | |
| 3/5 | zynq_slcr: Implement CPU resethw/ | +16 | 1 reply | |
| 4/5 | arm: Implement reset GPIO.target-arm/ target-arm/ | +28 | 5 replies | |
| 5/5 | arm: zynq: Connect CPU resets to SLCRhw/ | +4 | 0 replies |
Reviews trailers per patch
2 of 5 patches have a Reviewed-by or Acked-by.
| Patch | Peter Maydell |
|---|---|
| 1/5 | |
| 2/5 | R-b |
| 3/5 | R-b |
| 4/5 | |
| 5/5 |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [Qemu-devel] [PATCH target-arm v5 0/5] Reset and Halting modifications + Zynq SMP
Hi All,
The clock controller module in the Zynq platform has the ability to halt and reset arbitrary devices, including the CPU. We use this feature to implement SMP Linux - the kernel halts CPU1 then rewrites the vector table to the secondary entry point and the resets+unhalts.
This series adds SMP support to the Zynq machine, and patches the Zynq SLCR (the clock controller) to have GPIOs connected to the CPUs. The GPIOs cause and ARM CPU reset.
Only the reset side is implemented (which is good enough for SMP linux as it stands). Future work is to implement the halting behaviour as well.
changed since v4 (PMM review):
Convert to GPIO scheme
Implemented custom secondary cpu reset
OCM Macro cleanup
changed since v3:
Removed halting patches
Reduced to minimal change needed for SMP Zynq
Peter Crosthwaite (5):
arm: zynq: Macroify OCM Base and Size
arm: zynq: added SMP support
zynq_slcr: Implement CPU reset
arm: Implement reset GPIO.
arm: zynq: Connect CPU resets to SLCR
hw/arm/xilinx_zynq.c | 87 ++++++++++++++++++++++++++++++++++++++++------------ hw/misc/zynq_slcr.c | 16 ++++++++++ target-arm/cpu.c | 23 ++++++++++++++ target-arm/cpu.h | 8 +++-- 4 files changed, 112 insertions(+), 22 deletions(-)
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