ASoC: fsl_esai: Fix some issues
Status from this message: Applied all, thanks.
Get series with b4
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Patches in v1 Applied
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/4 | ASoC: fsl_esai: Fix incorrect condition within ratio range check for FPsound/ | +2 | 0 replies | |
| 2/4 | ASoC: fsl_esai: Only bypass sck_div for EXTAL sourcesound/ | +7 | 0 replies | |
| 3/4 | ASoC: fsl_esai: Bypass divider settings if clock requirement is not changedsound/ | +20 | 0 replies | |
| 4/4 | ASoC: fsl_esai: Set PCRC and PRRC registers at the end of hw_params()sound/ | +5 | 0 replies |
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Cover letter [PATCH RESEND 0/4] ASoC: fsl_esai: Fix some issues
Sorry for this resend. I just found my previous patches have not been delivered successfully to the alsa maillist.
This series of patches fix the following problems:
PATCH-1 for an incorrect ratio range check.
PATCH-2 for an incorrect bypass settings of FSYS clock source. PATCH-3 for duplicated calculations and configurations of dividers PATCH-4 for mismatched init flow of configuration comparing to RM.
Nicolin Chen (4):
ASoC: fsl_esai: Fix incorrect condition within ratio range check for
FP
ASoC: fsl_esai: Only bypass sck_div for EXTAL source
ASoC: fsl_esai: Bypass divider settings if clock requirement is not
changed
ASoC: fsl_esai: Set PCRC and PRRC registers at the end of hw_params()
sound/soc/fsl/fsl_esai.c | 45 ++++++++++++++++++++++++++++++++++----------- 1 file changed, 34 insertions(+), 11 deletions(-)
Signature · 1 line
1.8.4