RFC Memory and GPIO QOMification
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- v1 RFC Latest25 patches 5 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/25 | qdev: Implement named GPIOshw/ include/ qdev-monitor.c +1 more | +117 | 0 replies | |
| 2/25 | memory: Simplify mr_add_subregion() if-elsememory.c | +1 | 0 replies | |
| 3/25 | memory: Coreify subregion add functionalitymemory.c | +12 | 0 replies | |
| 4/25 | memory: MemoryRegion: QOMifyinclude/ memory.c | +42 | 0 replies | |
| 5/25 | memory: MemoryRegion: Add contained flaginclude/ memory.c | +6 | 0 replies | |
| 6/25 | memory: MemoryRegion: Add container and addr propsmemory.c | +54 | 0 replies | |
| 7/25 | memory: MemoryRegion: factor out memory region re-addermemory.c | +16 | 0 replies | |
| 8/25 | memory: MemoryRegion: Add may-overlap and priority propsinclude/ memory.c | +58 | 1 reply | |
| 9/25 | memory: MemoryRegion: Add size propertymemory.c | +38 | 0 replies | |
| 10/25 | exec: Parent root MRs to the machineexec.c | +4 | 0 replies | |
| 11/25 | irq: Slim conversion of qemu_irq to QOM [WIP]hw/ include/ | +43 | 3 replies | |
| 12/25 | qdev: gpio: Don't allow name share between I and Ohw/ | +2 | 0 replies | |
| 13/25 | qdev: gpio: Register GPIO inputs as child objectshw/ | +10 | 0 replies | |
| 14/25 | qdev: gpio: Register GPIO outputs as QOM linkshw/ | +12 | 0 replies | |
| 15/25 | qdev: gpio: Re-impement qdev_connect_gpio QOM stylehw/ | +4 | 0 replies | |
| 16/25 | qom: object_property_set/get: Add child recursionqom/ | +25 | 0 replies | |
| 17/25 | sysbus: Use TYPE_DEVICE GPIO functionalityhw/ include/ | +6 | 1 reply | |
| 18/25 | sysbus: Rework sysbus_mmio_map to use mr QOMificationhw/ include/ | +15 | 0 replies | |
| 19/25 | sysbus: Setup memory regions as dynamic propshw/ include/ | +18 | 0 replies | |
| 20/25 | sysbus: Enable hotplug.hw/ | +0 | 0 replies | |
| 21/25 | microblaze: s3adsp: Expand UART creatorhw/ | +4 | 0 replies | |
| 22/25 | microblaze: s3adsp: Parent devices with sane nameshw/ | +8 | 0 replies | |
| 23/25 | timer: xilinx_timer: Convert to realize()hw/ | +12 | 0 replies | |
| 24/25 | timer: xilinx_timer: init MMIO ASAPhw/ | +5 | 0 replies | |
| 25/25 | TEST: microblaze: s3adsp: Remove timerhw/ | +2 | 0 replies |
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Cover letter [Qemu-devel] [RFC v1 00/25] Memory and GPIO QOMification
Hi All,
This series is my Memory and GPIO qomification as promised. This was discussed at length on the KVM call 2014-05-13.
This is the preview RFC designed to show the capability of the full solution. There are many parts to this that stand in their own right and the merge would be done in smaller chunks (E.G. Memory and GPIO works can go separately).
Theres some Microblaze stuff at the back of the series, leading to an example of sysbus hotplug.
Some patches are already on list. I put those at the front of the series.
Only build tested for microblaze. There's some periphery build issues for fully configured builds that i'll figure should we get some conceptual level acceptance of this whole idea.
configure --target-list=microblaze-softmmu
to play with it.
Contents:
QOMify Memory regions. So they are added as child objects to devices. Devices can do this explicitly in instance_init, or sysbus can handle it - sysbus_init_mmio parents the memory region to the device to transparently convert all existing devs to compliance.
This prepares support for the Memory heirachy work. Machines can create memory regions matching the bus architectures. Masters and slaves can gen hand these to devices as proper Links.
The address and container (the memory region containing this one as a subregion) of memory regions are QOM properties, of type integer and link resp. Setting the properties does the memory_region_add_subregion().
The root Memory Region is parented the machine in exec.c. This give the Memory Region a canonical path.
Sysbus IRQ are abandoned completely and re-implemented as named GPIOs. The sysbus irq API remains and makes this transition behind-the-scenes.
GPIOs are QOMified. qemu_allocate_irqs does the object_new() etc. IRQ inputs are then added as child objects of the instantiating device. Handled by qemu_init_gpio_in_named(). gpio_outs are setup as links. qdev_connect_gpio_out does the linkage.
QOM is patched to allow setting of a device's child's properties from a ref to the parent. Best illustrated by example (see below).
Anyways without a single patch to the command line interface, HMP, QMP, or implementing any machine specific hotplug or adding any new special busses, this works:
-device xlnx.xps-timer,\
sysbus-mr-0/container=/machine/sysmem,\
sysbus-mr-0/addr=0x83c00000,\
sysbus-irq-0=/machine/intc/unnamed-gpio-0
All the other ways to create devices should just work, this is not a command line specific feature.
Note, I edited my machine model to sanitize the canonical path of the interrupt controller.
hw/microblaze/petalogix_s3adsp1800_mmu.c +2 -0
@@ -97,6 +97,8 @@ petalogix_s3adsp1800_init(QEMUMachineInitArgs *args) 1, 0x89, 0x18, 0x0000, 0x0, 1); dev =qdev_create (NULL ,"xlnx.xps-intc" ); +object_property_add_child (qdev_get_machine (),"intc" ,OBJECT (dev), + &error_abort);
But you could have done the whole /machine/unattached/... ugliness too. If you name the irq inputs in the intc with my named GPIO series stuff the unnamed-gpio ugliness goes away too. If you throw away sysbus and do the memory-regions and IRQs naming the child objects properly the ugly sysbus names can de dispensed with too. But thats a big tree-wide to name everything properly.
Andreas Färber (1):
irq: Slim conversion of qemu_irq to QOM [WIP]
Peter Crosthwaite (24):
qdev: Implement named GPIOs
memory: Simplify mr_add_subregion() if-else
memory: Coreify subregion add functionality
memory: MemoryRegion: QOMify
memory: MemoryRegion: Add contained flag
memory: MemoryRegion: Add container and addr props
memory: MemoryRegion: factor out memory region re-adder
memory: MemoryRegion: Add may-overlap and priority props
memory: MemoryRegion: Add size property
exec: Parent root MRs to the machine
qdev: gpio: Don't allow name share between I and O
qdev: gpio: Register GPIO inputs as child objects
qdev: gpio: Register GPIO outputs as QOM links
qdev: gpio: Re-impement qdev_connect_gpio QOM style
qom: object_property_set/get: Add child recursion
sysbus: Use TYPE_DEVICE GPIO functionality
sysbus: Rework sysbus_mmio_map to use mr QOMification
sysbus: Setup memory regions as dynamic props
sysbus: Enable hotplug.
microblaze: s3adsp: Expand UART creator
microblaze: s3adsp: Parent devices with sane names
timer: xilinx_timer: Convert to realize()
timer: xilinx_timer: init MMIO ASAP
TEST: microblaze: s3adsp: Remove timer
exec.c | 4 + hw/core/irq.c | 44 +++++- hw/core/qdev.c | 107 +++++++++++-- hw/core/sysbus.c | 85 ++++------ hw/microblaze/petalogix_s3adsp1800_mmu.c | 16 +- hw/timer/xilinx_timer.c | 26 ++-- include/exec/memory.h | 9 +- include/hw/irq.h | 2 + include/hw/qdev-core.h | 24 ++- include/hw/sysbus.h | 12 +- memory.c | 258 +++++++++++++++++++++++++------ qdev-monitor.c | 16 +- qom/object.c | 27 +++- qtest.c | 19 ++- 14 files changed, 500 insertions(+), 149 deletions(-)
Signature · 1 line
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