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cpu_arm: Implement irqchip property for ARM CPU

Pavel Fedin qemu-devel 2 versions – New

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  1. v2 Latest2 patches 0 repliesNew
  2. v12 patches 0 repliesSuperseded

Changes in v2 from the cover letter

- Set link to nvic after it has been initialized
- Changed object type to "sys-bus-device" because GICv2 and GICv3 do not share common ancestors above that.

Patches in v2 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/2cpu_arm: Rename 'nvic' to 'irqchip'hw/arm/armv7m.c target-arm/cpu.h target-arm/helper.c+11 -80 replies
2/2armv7m: Use irqchip property instead of direct assignmenthw/arm/armv7m.c target-arm/cpu.c+8 -30 replies

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No Reviewed-by, Acked-by or Tested-by trailers for v2 yet.

Read the v2 thread

Cover letter [Qemu-devel] [PATCH v2 0/2] cpu_arm: Implement irqchip property for ARM CPU

ARMv7m CPU needs a link to NVIC instance for processing interrupts. Similarly ARMv8 needs a link to GICv3 for its CPU interface.

This series builds upon existing mechanism for linking irqchip and CPU, bringing the code up to date and making it reusable. Another small step towards complete GICv3 implementation.

v1 => v2:
- Set link to nvic after it has been initialized
- Changed object type to "sys-bus-device" because GICv2 and GICv3 do not share common ancestors above that.

Pavel Fedin (2):
cpu_arm: Rename 'nvic' to 'irqchip'
armv7m: Use irqchip property instead of direct assignment

 hw/arm/armv7m.c     |  5 ++---
 target-arm/cpu.c    |  6 ++++++
 target-arm/cpu.h    |  5 ++++-
 target-arm/helper.c | 12 ++++++------
 4 files changed, 18 insertions(+), 10 deletions(-)
Signature · 1 line
1.9.5.msysgit.0

Read the cover letter in its thread