Cavium ThunderX PMU support
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v4 Latest5 patches 11 repliesIn review
- v35 patches 12 repliesSuperseded
- v25 patches 2 repliesSuperseded
Changes to v3 from the cover letter
- renamed A57 events to IMPDEF
- changed comment about 64 bit cycle counter overflow
- unconditionally increase event mask
Patches in v4 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/5 | arm64/perf: Rename Cortex A57 eventsarch/ | +13 | 0 replies | |
| 2/5 | arm64/perf: Add Cavium ThunderX PMU supportarch/ | +68 | 0 replies | |
| 3/5 | arm64: dts: Add Cavium ThunderX specific PMUDocumentation/ arch/ | +6 | 3 replies | |
| 4/5 | arm64/perf: Enable PMCR long cycle counter bitarch/ | +16 | 8 replies | |
| 5/5 | arm64/perf: Extend event mask for ARMv8.1arch/ | +2 | 0 replies |
Reviews trailers per patch
No Reviewed-by, Acked-by or Tested-by trailers for v4 yet.
Cover letter [PATCH v4 0/5] Cavium ThunderX PMU support
Hi,
this should address all comments. With the simplified event mask arm isn't touched anymore and also the cpuid check vanished.
Changes to v3:
- renamed A57 events to IMPDEF
- changed comment about 64 bit cycle counter overflow
- unconditionally increase event mask
Changes to v2:
- fixed arm compile errors
Changes to v1:
- renamed thunderx dt pmu binding to thunder
Jan
--------------------------------------------------------
Jan Glauber (5):
arm64/perf: Rename Cortex A57 events
arm64/perf: Add Cavium ThunderX PMU support
arm64: dts: Add Cavium ThunderX specific PMU
arm64/perf: Enable PMCR long cycle counter bit
arm64/perf: Extend event mask for ARMv8.1
Documentation/devicetree/bindings/arm/pmu.txt | 1 + arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 5 ++ arch/arm64/kernel/perf_event.c | 120 +++++++++++++++++++++----- 3 files changed, 105 insertions(+), 21 deletions(-)
Signature · 1 line
1.9.1