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KVM TSS cleanups and speedups

Andy Lutomirski kvm lkml 2 versions – In review

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  1. v2 Latest7 patches 4 repliesIn review
  2. v16 patches 3 repliesSuperseded

Changes in v2 from the cover letter

- Fix some changelog typos.
- Fix the bug that Paolo found.
- Rename the helpers to make their usage more obvious.
- Move clearing __tss_limit_invalid into force_reload_TR() as a tiny optimization.
- Add a test case. It doesn't test all the machinations, but at least it checks basic functionality.

Patches in v2 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/7x86/asm: Define the kernel TSS limit in a macroarch/x86/include/asm/desc.h arch/x86/include/asm/processor.h+11 -90 replies
2/7x86/kvm/vmx: Don't fetch the TSS base from the GDTarch/x86/kvm/vmx.c+4 -100 replies
3/7x86/kvm/vmx: Get rid of segment_base() on 64-bit kernelsarch/x86/kvm/vmx.c+7 -40 replies
4/7x86/kvm/vmx: Simplify segment_base()arch/x86/kvm/vmx.c+7 -80 replies
5/7x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tssarch/x86/include/asm/processor.h+1 -10 replies
6/7x86/kvm/vmx: Defer TR reload after VM exitarch/x86/include/asm/desc.h arch/x86/kernel/ioport.c arch/x86/kernel/process.c +1 more+82 -140 replies
7/7selftests/x86: Add a basic selftest for iopermtools/testing/selftests/x86/Makefile tools/testing/selftests/x86/ioperm.c+172 -10 replies

Reviews trailers per patch

No Reviewed-by, Acked-by or Tested-by trailers for v2 yet.

Read the v2 thread

Cover letter [PATCH v2 0/7] KVM TSS cleanups and speedups

The first four patches here are intended to be straightforward cleanups and to make a better base for Thomas' GDT series. They may be a slight speedup, too, because they remove an STR instruction from the VMX entry path.

The last two patches are a reasonably large speedup but need careful review.

FWIW, I can see lots of additional easy-ish speedups here. For example:

- The GDT reload on VM exit isn't really needed at all. Instead let's just change the kernel limit to 0xFFFF. Doing that naively would waste memory, but doing it carefully on top of Thomas' series would be straightforward and almost free.

- RDMSR from MSR_GS_BASE is totally pointless.

- Once I or someone finishes the FSGSBASE series, we get a big speedup there.

- The LDT reload code should be split up and optimized better, I think.

Changes from v1:
- Fix some changelog typos.
- Fix the bug that Paolo found.
- Rename the helpers to make their usage more obvious.
- Move clearing __tss_limit_invalid into force_reload_TR() as a tiny optimization.
- Add a test case. It doesn't test all the machinations, but at least it checks basic functionality.

Andy Lutomirski (7):
x86/asm: Define the kernel TSS limit in a macro x86/kvm/vmx: Don't fetch the TSS base from the GDT x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels x86/kvm/vmx: Simplify segment_base()
x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss x86/kvm/vmx: Defer TR reload after VM exit selftests/x86: Add a basic selftest for ioperm

 arch/x86/include/asm/desc.h          |  62 +++++++++++--
 arch/x86/include/asm/processor.h     |  12 ++-
 arch/x86/kernel/ioport.c             |  11 +++
 arch/x86/kernel/process.c            |  10 ++
 arch/x86/kvm/vmx.c                   |  63 ++++++-------
 tools/testing/selftests/x86/Makefile |   2 +-
 tools/testing/selftests/x86/ioperm.c | 171 +++++++++++++++++++++++++++++++++++
 7 files changed, 284 insertions(+), 47 deletions(-)
 create mode 100644 tools/testing/selftests/x86/ioperm.c
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