Add limited MXU instruction support
Get series with b4
b4 am [email protected]Versions newest first · linked by author and title
- v4 Latest9 patches 13 repliesIn review
- v38 patches 20 repliesSuperseded
- v26 patches 1 replySuperseded
Earlier versions · 1
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v1 | 7 patches | 10 replies | Superseded |
Patches in v4 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/9 | target/mips: Introduce MXU registerstarget/ target/ | +22 | 1 reply | |
| 2/9 | target/mips: Add all MXU opcodestarget/ | +60 | 2 replies | |
| 3/9 | target/mips: Split mips instruction handlingtarget/ target/ | +28 | 4 replies | |
| 4/9 | target/mips: Add MXU instructions S32I2M and S32M2Itarget/ | +83 | 1 reply | |
| 5/9 | target/mips: Add MXU instruction S8LDDtarget/ | +98 | 3 replies | |
| 6/9 | target/mips: Add MXU instruction D16MULtarget/ | +70 | 0 replies | |
| 7/9 | target/mips: Add MXU instruction D16MACtarget/ | +95 | 0 replies | |
| 8/9 | target/mips: Add MXU instructions Q8MUL and Q8MULSUtarget/ | +95 | 0 replies | |
| 9/9 | target/mips: Add MXU instructions S32LDD and S32LDDRtarget/ | +49 | 0 replies |
Reviews trailers per patch
1 of 9 patches has a Reviewed-by or Acked-by.
| Patch | Richard Henderson |
|---|---|
| 1/9 | R-b |
| 2/9 | |
| 3/9 | |
| 4/9 | |
| 5/9 | |
| 6/9 | |
| 7/9 | |
| 8/9 | |
| 9/9 |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [Qemu-devel] [PATCH v4 0/9] Add limited MXU instruction support
This patch set begins to add MXU instruction support for mips emulation.
Craig Janeczek (9):
target/mips: Introduce MXU registers target/mips: Add all MXU opcodes target/mips: Split mips instruction handling target/mips: Add MXU instructions S32I2M and S32M2I target/mips: Add MXU instruction S8LDD target/mips: Add MXU instruction D16MUL target/mips: Add MXU instruction D16MAC target/mips: Add MXU instructions Q8MUL and Q8MULSU target/mips: Add MXU instructions S32LDD and S32LDDR
target/mips/cpu.h | 2 + target/mips/mips-defs.h | 1 + target/mips/translate.c | 598 +++++++++++++++++++++++++++++++++++++++- 3 files changed, 600 insertions(+), 1 deletion(-)
Signature · 1 line
2.18.0