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Raspberry Pi SPI speedups

Lukas Wunner dmaengine 1 version In review

Get series with b4
b4 am [email protected]

Versions newest first

  1. v1 Latest10 patches 18 repliesIn review

Patches in v1 No applies recorded yet

#Subject and filesSizeRepliesApplied
1/10dmaengine: bcm2835: Allow reusable descriptorsdrivers/dma/bcm2835-dma.c+1 -01 reply
2/10dmaengine: bcm2835: Allow cyclic transactions without interruptdrivers/dma/bcm2835-dma.c+10 -21 reply
3/10spi: Guarantee cacheline alignment of driver-private datadrivers/spi/spi.c+12 -61 reply
4/10spi: bcm2835: Drop dma_pending flagdrivers/spi/spi-bcm2835.c+8 -150 replies
5/10spi: bcm2835: Work around DONE bit erratumdrivers/spi/spi-bcm2835.c+12 -24 replies
6/10spi: bcm2835: Cache CS register value for ->prepare_message()drivers/spi/spi-bcm2835.c+27 -200 replies
7/10spi: bcm2835: Speed up TX-only DMA transfers by clearing RX FIFOdrivers/spi/spi-bcm2835.c+218 -230 replies
8/10dmaengine: bcm2835: Document struct bcm2835_dmadevdrivers/dma/bcm2835-dma.c+6 -01 reply
9/10dmaengine: bcm2835: Avoid accessing memory when copying zeroesdrivers/dma/bcm2835-dma.c+19 -01 reply
10/10spi: bcm2835: Speed up RX-only DMA transfers by zero-filling TX FIFOdrivers/spi/spi-bcm2835.c+82 -110 replies

Reviews trailers per patch

4 of 10 patches have a Reviewed-by or Acked-by of their own; the series has one for all of them.

PatchNuno SáNoralf TrønnesVinod KoulStefan WahrenMartin Sperl
SeriesT-b A-b A-b
1/10T-b A-b
2/10T-b A-b
3/10T-b
4/10T-b
5/10T-b
6/10T-b
7/10T-b
8/10T-b A-b
9/10T-b A-b
10/10T-b

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 5 reviewers.

Read the v1 thread

Cover letter [PATCH 00/10] Raspberry Pi SPI speedups

So far the BCM2835 SPI driver cannot cope with TX-only and RX-only transfers (rx_buf or tx_buf is NULL) when using DMA: It relies on the SPI core to convert them to full-duplex transfers by allocating and DMA-mapping a dummy rx_buf or tx_buf. This costs performance.

Resolve by pre-allocating reusable DMA descriptors which cyclically clear the RX FIFO (for TX-only transfers) or zero-fill the TX FIFO (for RX-only transfers). Patch [07/10] provides some numbers for the achieved latency improvement and CPU time reduction with an SPI Ethernet controller. SPI displays should see a similar speedup. I've also made an effort to reduce peripheral and memory bus accesses.

The series is meant to be applied on top of broonie/for-next. It can be applied to Linus' current tree if commit 8d8bef503658 ("spi: bcm2835: Fix 3-wire mode if DMA is enabled") is cherry-picked from broonie's repo beforehand.

Please review and test. Thank you.

Lukas Wunner (10):
dmaengine: bcm2835: Allow reusable descriptors
dmaengine: bcm2835: Allow cyclic transactions without interrupt
spi: Guarantee cacheline alignment of driver-private data
spi: bcm2835: Drop dma_pending flag
spi: bcm2835: Work around DONE bit erratum
spi: bcm2835: Cache CS register value for ->prepare_message()
spi: bcm2835: Speed up TX-only DMA transfers by clearing RX FIFO
dmaengine: bcm2835: Document struct bcm2835_dmadev
dmaengine: bcm2835: Avoid accessing memory when copying zeroes
spi: bcm2835: Speed up RX-only DMA transfers by zero-filling TX FIFO

 drivers/dma/bcm2835-dma.c |  38 +++-
 drivers/spi/spi-bcm2835.c | 408 ++++++++++++++++++++++++++++++++------
 drivers/spi/spi.c         |  18 +-
 3 files changed, 390 insertions(+), 74 deletions(-)
Signature · 1 line
2.20.1