iommu/arm-smmu-v3: Reduce latency in __arm_smmu_tlb_inv_range()
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- v1 Latest3 patches 30 repliesIn review
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/3 | iommu/io-pgtable-arm: Add nents_per_pgtable in struct io_pgtable_cfgdrivers/ include/ | +5 | 21 replies | |
| 2/3 | iommu/arm-smmu-v3: Add an arm_smmu_tlb_inv_domain helperdrivers/ | +15 | 4 replies | |
| 3/3 | iommu/arm-smmu-v3: Add a max_tlbi_ops for __arm_smmu_tlb_inv_range()drivers/ drivers/ | +10 | 5 replies |
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Cover letter [PATCH 0/3] iommu/arm-smmu-v3: Reduce latency in __arm_smmu_tlb_inv_range()
This series is reformatted from the tlb_invalidate_threshold patch:
https://lore.kernel.org/linux-iommu/ZN5oojF6vKOKB%2FeI@Asurada-Nvidia/
The discussion in the thread above moved towards the direction of adding an arbitrary max_tlbi_ops (similar to MAX_TLBI_OPS in tlbflush.h file).
The changes here aim to reduce the latency in __arm_smmu_tlb_inv_range() due to the large number of TLBI commands on an SMMU without the support of range TLBI commands. The solution is to add a threshold at the number of TLBI commands that one __arm_smmu_tlb_inv_range() callback can issue, and to replace those TLBI commands with one single per-asid or per-vmid TLBI command.
Nicolin Chen (3):
iommu/io-pgtable-arm: Add nents_per_pgtable in struct io_pgtable_cfg iommu/arm-smmu-v3: Add an arm_smmu_tlb_inv_domain helper iommu/arm-smmu-v3: Add a max_tlbi_ops for __arm_smmu_tlb_inv_range()
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 34 +++++++++++++++------ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + drivers/iommu/io-pgtable-arm.c | 3 ++ include/linux/io-pgtable.h | 2 ++ 4 files changed, 30 insertions(+), 10 deletions(-)
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2.41.0