iommu/arm-smmu-v3: Fix hitless STE update in nesting cases

Occasional C_BAD_STE errors were observed in nesting setups where a device attached to a nested bypass/identity domain enables PASID.

This occurred when the physical STE was updated from S2-only mode to S1+S2 nesting mode, but the update failed to use the hitless routine that it was supposed to use. Instead, it cleared STE.V bit to load the CD table, while the default substream was still actively performing DMA.

It was later found that the diff algorithm in arm_smmu_entry_qword_diff() enforced an additional critical word due to misaligned MEV and EATS fields between S2-only and S1+S2 modes.

Both fields are either well-managed or non-critical, so move them to the "ignored" list to relax the qword diff algorithm.

Additionally, add KUnit test coverage for these nesting STE cases.

This is on Github:
https://github.com/nicolinc/iommufd/commits/smmuv3_ste_fixes/

A host kernel must apply this to fix the bug.

Changelog
v7:
* Add Reviewed-by from Pranjal
* Replace the 2-bit EATS field with the EATS_TRANS bit
* Ensure S1CHK is not set when returning EATS to the safe bits
v6:
* Add Reviewed-by from Mostafa
* Update inline comments for EATS
* Ensure S2S is not set when returning EATS to the safe bits
v5:
* Pass in feat to arm_smmu_test_make_s2_ste()
v4:
https://lore.kernel.org/all/[email protected]/
* s/ignored/update_safe
* Change entry_set to void
v3:
https://lore.kernel.org/all/[email protected]/
* Add Reviewed-by from Shuai
* Add an inline comments in nested test cases
* Reuse arm_smmu_test_make_cdtable_ste() for nested test cases
v2:
https://lore.kernel.org/all/[email protected]/
* Fix kunit tests
* Update commit message and inline comments
* Keep MEV/EATS in used list by masking them away using ignored_bits
v1:
https://lore.kernel.org/all/[email protected]/

Jason Gunthorpe (3):
iommu/arm-smmu-v3: Add update_safe bits to fix STE update sequence iommu/arm-smmu-v3: Mark STE MEV safe when computing the update
sequence
iommu/arm-smmu-v3: Mark EATS_TRANS safe when computing the update
sequence

Nicolin Chen (1):
iommu/arm-smmu-v3-test: Add nested s1bypass/s1dssbypass coverage

 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h   |  4 +
 .../iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c  | 78 ++++++++++++++++++-
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c   | 64 +++++++++++++--
 3 files changed, 136 insertions(+), 10 deletions(-)

2.43.0