iommu/arm-smmu-v3: Add PRI support
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b4 am [email protected]Versions newest first · linked by author and title
- v5 Latest15 patches 24 repliesIn review
- v415 patches 10 repliesSuperseded
- v313 patches 32 repliesSuperseded
Earlier versions · 2
| Version | Posted | Patches | Replies | Status |
|---|---|---|---|---|
| v2 | 11 patches | 11 replies | Superseded | |
| v1 | 3 patches | 4 replies | Superseded |
Changes in v5 from the cover letter
* Add review tags from Jonathan
* Gate the PASID Stop Marker discard on SSV
* Follow coding-assistants.rst for the Assisted-by tags
* Sample the drain wait early in arm_smmu_wait_for_queue_drained(), for Sashiko finding:
https://sashiko.dev/#/patchset/cover.1789081084.git.nicolinc%40nvidia.com?part=4
Patches in v5 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/15 | iommu/arm-smmu-v3: Disable the impl before disabling the SMMU on shutdowndrivers/ | +1 | 1 reply | |
| 2/15 | iommu/arm-smmu-v3: Add arm_smmu_attach_release()drivers/ drivers/ drivers/ | +36 | 1 reply | |
| 3/15 | iommu/arm-smmu-v3: Add Q_POS() macrodrivers/ drivers/ | +7 | 1 reply | |
| 4/15 | iommu/arm-smmu-v3: Drain in-flight fault events on domain detachdrivers/ drivers/ | +103 | 7 replies | |
| 5/15 | iommu/arm-smmu-v3: Flush in-flight fault work on domain detachdrivers/ | +43 | 1 reply | |
| 6/15 | iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVAdrivers/ drivers/ | +2 | 1 reply | |
| 7/15 | iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF eventdrivers/ drivers/ | +56 | 1 reply | |
| 8/15 | iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMUdrivers/ | +31 | 3 replies | |
| 9/15 | iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registereddrivers/ | +8 | 1 reply | |
| 10/15 | iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr()drivers/ | +47 | 2 replies | |
| 11/15 | iommu/arm-smmu-v3: Discard partial PRI faults on PRIQ overflowdrivers/ | +13 | 1 reply | |
| 12/15 | iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRIdrivers/ | +1 | 1 reply | |
| 13/15 | PCI/ATS: Add PRI stubsinclude/ | +5 | 1 reply | |
| 14/15 | PCI/ATS: Export pci_enable_pri() and pci_reset_pri()drivers/ | +2 | 1 reply | |
| 15/15 | iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device()drivers/ drivers/ | +53 | 0 replies |
Reviews trailers per patch
All 15 patches have a Reviewed-by or Acked-by.
| Patch | Jonathan Cameron | Bjorn Helgaas | Kuppuswamy Sathyanarayanan | Jason Gunthorpe |
|---|---|---|---|---|
| 1/15 | R-b | R-b | ||
| 2/15 | R-b | R-b | ||
| 3/15 | R-b | |||
| 4/15 | R-b | |||
| 5/15 | R-b | |||
| 6/15 | R-b | |||
| 7/15 | R-b | R-b | ||
| 8/15 | R-b | |||
| 9/15 | R-b | R-b | ||
| 10/15 | R-b | R-b | ||
| 11/15 | R-b | R-b | ||
| 12/15 | R-b | R-b | ||
| 13/15 | R-b | A-b | R-b | R-b |
| 14/15 | R-b | A-b | R-b | R-b |
| 15/15 | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes. Scroll the table sideways for all 4 reviewers.
Cover letter [PATCH v5 00/15] iommu/arm-smmu-v3: Add PRI support
The SMMUv3 driver doesn't handle events on the PRI queue or respond to IOPF faults. This series adds the missing pieces, using the IOPF infrastructure, to convert PRI page requests into iopf_faults and issue CMDQ_OP_PRI_RESP.
The iopf_queue_flush_dev() contract requires the driver to first drain the hardware PRI queue and synchronize using a threaded IRQ handler before the IOPF software flush. This drove the additional commits compared to v1:
- arm_smmu_wait_for_queue_drained() drains the hardware queue by counting the entries that the threaded IRQ handler consumes
- arm_smmu_attach_release() moves the teardown outside the global lock
- synchronize_irq() closes the gap before the final flush
Note that, although this series is only about PRIQ and EVTQ, the Q_POS(), Q_DIFF() and arm_smmu_wait_for_queue_drained() helpers will be shared with Pranj's RPM series, per discussion below for CMDQ to use as well:
https://lore.kernel.org/all/[email protected]/
This is on Github:
https://github.com/nicolinc/iommufd/commits/smmuv3_pri-v5
FWIW, engineers on the NVIDIA side have managed to verify the PRI feature.
Changelog
v5:
* Add review tags from Jonathan
* Gate the PASID Stop Marker discard on SSV
* Follow coding-assistants.rst for the Assisted-by tags
* Sample the drain wait early in arm_smmu_wait_for_queue_drained(), for Sashiko finding:
https://sashiko.dev/#/patchset/cover.1789081084.git.nicolinc%40nvidia.com?part=4
v4:
https://lore.kernel.org/all/[email protected]/
* Add review tags from Jonathan
* Simplify verbose commit messages
* Use fsleep() in the drain poll loop
* Drop the goto in arm_smmu_set_pasid()
* Drop the WARN_ON() on a drain timeout
* Gate the evtq/priq drain on using_iopf
* Add a prm pointer in arm_smmu_page_response()
* Run impl_ops->device_disable() before SMMU shutdown
* Track a drain timeout in a bool instead of an errno
* Add a Q_DIFF() macro for the queue position differences
* Rename arm_smmu_drain_queue() to arm_smmu_wait_for_queue_drained()
* Split the fault report and the overflow discard into two patches
v3:
https://lore.kernel.org/all/[email protected]/
* Rebase on v7.3-rc1
* Drop FEAT_SVA gate on IOPF queue allocation
* Discard partial PRI faults on PRIQ overflow
* Refuse PRI on a PCIe master with stall_enabled
* Merge and ratelimit the unexpected PRI request prints
* Disable EVTQ/PRIQ/combined IRQs before iopf_queue_free()
* Reclaim a leaked IOPF enrollment in arm_smmu_release_device()
* Leak master_domain on a drain timeout instead of risking a UAF
* Fix the IOMMU_PAGE_RESP code mapping in arm_smmu_page_response()
* Rework arm_smmu_drain_queue() into a counting-based sleeping poll
* Split the fault event drain and the fault work flush into two patches
* Drop IOMMU_FAULT_PAGE_REQUEST_STALLS_TRANS; dispatch on per-master state
v2:
https://lore.kernel.org/all/[email protected]/
* Allocate evtq.iopf for ARM_SMMU_FEAT_PRI
* Pick up Jean's PRI stubs and PRI export patches
* Enable PRI for PCI devices in arm_smmu_probe_device()
* Add arm_smmu_drain_queue_for_iopf() for EVTQ and PRIQ
* Add arm_smmu_attach_release() to rework the IOPF drain
* Add IOMMU_FAULT_PAGE_REQUEST_STALLS_TRANS for STALL mode
* Gate pci_enable_pri() on FEAT_PRI plus a non-NULL evtq.iopf
* Deny unrecognised-StreamID PRG_LAST in arm_smmu_handle_ppr()
* Disable PRI when no IRQ handler is registered (unique or combined IRQ)
v1:
https://lore.kernel.org/all/[email protected]/
Jean-Philippe Brucker (2):
PCI/ATS: Add PRI stubs
PCI/ATS: Export pci_enable_pri() and pci_reset_pri()
Malak Marrid (1):
iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event
Nicolin Chen (12):
iommu/arm-smmu-v3: Disable the impl before disabling the SMMU on
shutdown
iommu/arm-smmu-v3: Add arm_smmu_attach_release() iommu/arm-smmu-v3: Add Q_POS() macro
iommu/arm-smmu-v3: Drain in-flight fault events on domain detach iommu/arm-smmu-v3: Flush in-flight fault work on domain detach iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr() iommu/arm-smmu-v3: Discard partial PRI faults on PRIQ overflow iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI iommu/arm-smmu-v3: Enable PRI for PCI device in
arm_smmu_probe_device()
drivers/iommu/arm/Kconfig | 2 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 7 + include/linux/pci-ats.h | 5 + .../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 1 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 444 +++++++++++++++--- drivers/pci/ats.c | 2 + 6 files changed, 405 insertions(+), 56 deletions(-)
base-commit: cee9395acd8043be0644b25c34bfa86623f2b935
Signature · 1 line
2.43.0