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clk: mediatek: fix gate-less mux definitions

Daniel Golle linux-arm-kernel linux-clk linux-mediatek lkml 1 version Applied

Status from this message: Applied to clk-next

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  1. v2 Latest3 patches 6 repliesApplied

Patches in v2 Applied

#Subject and filesSizeRepliesApplied
1/3clk: mediatek: add MUX_CLR_SET macrodrivers/clk/mediatek/clk-mux.h+5 -02 replies
2/3clk: mediatek: mt8192: use MUX_CLR_SETdrivers/clk/mediatek/clk-mt8192.c+2 -22 replies
3/3clk: mediatek: mt7988: use MUX_CLR_SET for gate-less muxesdrivers/clk/mediatek/clk-mt7988-infracfg.c+38 -422 replies

Reviews trailers per patch

All 3 patches have a Reviewed-by or Acked-by.

PatchChen-Yu Tsai
1/3R-b
2/3R-b
3/3R-b

Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.

Read the v2 thread

Cover letter [PATCH v2 0/3] clk: mediatek: fix gate-less mux definitions

Some MediaTek clock drivers define gate-less muxes without an update register using MUX_GATE_CLR_SET_UPD, passing -1 as a sentinel for the absent gate and update fields. Since those fields are stored in u8 and u32 struct members, the -1 truncates to unexpected values.

Add MUX_CLR_SET, a wrapper around MUX_CLR_SET_UPD that hardcodes the absent fields, and convert the affected mux definitions in mt8192 and mt7988 to use it.

Daniel Golle (3):
clk: mediatek: add MUX_CLR_SET macro
clk: mediatek: mt8192: use MUX_CLR_SET
clk: mediatek: mt7988: use MUX_CLR_SET for gate-less muxes

 drivers/clk/mediatek/clk-mt7988-infracfg.c | 80 ++++++++++------------
 drivers/clk/mediatek/clk-mt8192.c          |  4 +-
 drivers/clk/mediatek/clk-mux.h             |  6 ++
 3 files changed, 46 insertions(+), 44 deletions(-)
Signature · 1 line
2.53.0

Read the cover letter in its thread