net: dsa: mt7530: add EcoNet EN7528 built-in switch support

The EcoNet EN7528 is a MIPS SoC whose platform support is already upstream. It integrates an MT7530 switch, memory-mapped like the built-in switches of the MediaTek MT7988 and Airoha EN7581/AN7583 SoCs, but with a true MT7530 core, four Gigabit PHYs on ports 1-4 and a CPU port at a fixed 1000 Mbps full duplex link.

Patch 1 documents the compatible, patch 2 adds the driver support.

Changes in v2:
- patch 1: reword the commit message to explain what distinguishes the EN7528 from the other built-in switches and why it cannot fall back to one of their compatibles (Conor Dooley).
- patch 2: drop the setup-time EEE advertisement register writes. Instead leave lpi_capabilities empty for the EN7528, so phylink disables EEE on its PHYs via phy_disable_eee() and rejects enabling it from userspace (Andrew Lunn).
- Link to v1:
https://lore.kernel.org/netdev/[email protected]/

Ahmed Naseef (2):
dt-bindings: net: dsa: mediatek,mt7530: add econet,en7528-switch
net: dsa: mt7530: add EN7528 support

 .../bindings/net/dsa/mediatek,mt7530.yaml     |  5 ++
 drivers/net/dsa/mt7530-mmio.c                 |  1 +
 drivers/net/dsa/mt7530.c                      | 58 ++++++++++++++++---
 drivers/net/dsa/mt7530.h                      |  1 +
 4 files changed, 57 insertions(+), 8 deletions(-)

Range-diff against v1:
1: 68e85666b6df ! 1: 2133035bb22e dt-bindings: net: dsa: mediatek,mt7530: add econet,en7528-switch
@@ Commit message
are connected to integrated Gigabit PHYs and its CPU port is connected internally to the SoC Ethernet MAC.

+ Those three switches are MT7531-based, whereas the EN7528 has a genuine
+ MT7530 switch core (its chip revision register reads 0x7530). The two
+ generations differ in their register programming - for example the CPU
+ port is selected through the MT7530-style MFC register rather than the
+ MT7531 CFC register - so the EN7528 is not compatible with the existing
+ switch compatibles and cannot fall back to one of them.
+
Add the econet,en7528-switch compatible, with the same constraints as the other built-in switches.

2: 1865eaedef97 ! 2: 8c7dfabd860a net: dsa: mt7530: add EN7528 support
@@ Commit message
an ID_EN7528 variant bound with the "econet,en7528-switch" compatible, reusing mt7988_setup() and the indirect PHY accessors.

- The switch core, however, is an MT7530 and not an MT7531 derivative: it
- has no MT7531 CFC register, and the CPU port to trap frames to is set
- through the MT7530-style CPU_EN / CPU_PORT fields of the MFC register, so
- add it to the MT7530 handling in mt753x_conduit_state_change(). For the
+ The switch core, however, is an MT7530 and not an MT7531 derivative: the
+ CPU port to trap frames to is set through the MT7530-style CPU_EN /
+ CPU_PORT fields of the MFC register rather than the MT7531 CFC register,
+ so add it to the MT7530 handling in mt753x_conduit_state_change(). For the
same reason the MT7530 mirror and force-mode register layouts already apply to it as the default of the MT753X_*() macros.

@@ Commit message
EN7581 switches, whose CPU ports run at 10 Gbps.

The LAN GPHYs advertise EEE by default, but negotiating EEE with some
- link partners results in an unstable link with dropped frames. Disable
- EEE advertisement on them at setup time, like mt7531_setup() does for the
- MT7531 switch PHYs.
+ link partners results in an unstable link with dropped frames. Leave the
+ LPI capabilities empty for the EN7528 so that phylink disables EEE on
+ these PHYs and refuses to enable it from userspace.

@@ drivers/net/dsa/mt7530.c: static void en7581_mac_port_get_caps(struct dsa_switch
static void
mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
phy_interface_t interface)
+@@ drivers/net/dsa/mt7530.c: static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,
+ struct phylink_config *config)
+ {
+ struct mt7530_priv *priv = ds->priv;
+- u32 eeecr;
+
+ config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE;
+
+- config->lpi_capabilities = MAC_100FD | MAC_1000FD | MAC_2500FD;
+-
+- eeecr = mt7530_read(priv, MT753X_PMEEECR_P(port));
+- /* tx_lpi_timer should be in microseconds. The time units for
+- * LPI threshold are unspecified.
++ /* The EN7528 GPHYs report EEE capability, but negotiating EEE with
++ * common link partners (e.g. Realtek GbE NICs) results in an unstable
++ * link with dropped frames. Leave the LPI capabilities empty so that
++ * phylink disables EEE on these PHYs and refuses to enable it from
++ * userspace.
+ */
+- config->lpi_timer_default = FIELD_GET(LPI_THRESH_MASK, eeecr);
++ if (priv->id != ID_EN7528) {
++ u32 eeecr = mt7530_read(priv, MT753X_PMEEECR_P(port));
++
++ config->lpi_capabilities = MAC_100FD | MAC_1000FD | MAC_2500FD;
++ /* tx_lpi_timer should be in microseconds. The time units for
++ * LPI threshold are unspecified.
++ */
++ config->lpi_timer_default = FIELD_GET(LPI_THRESH_MASK, eeecr);
++ }
+
+ priv->info->mac_port_get_caps(ds, port, config);
+ }
@@ drivers/net/dsa/mt7530.c: mt753x_conduit_state_change(struct dsa_switch *ds,
* forwarded to the numerically smallest CPU port whose conduit
* interface is up.
@@ drivers/net/dsa/mt7530.c: mt753x_conduit_state_change(struct dsa_switch *ds,
return;

mask = BIT(cpu_dp->index);
-@@ drivers/net/dsa/mt7530.c: static int mt753x_setup_tc(struct dsa_switch *ds, int port,
- }
- }
-
-+/* The EN7528 LAN ports are integrated GPHYs at MDIO addresses 9..12 (switch -+ * ports 1..4) on the switch internal MDIO bus, reachable only through the PHY -+ * indirect access registers. There is no mdiodev to derive the addresses from. -+ */
-+#define EN7528_GPHY_BASE 9
-+#define EN7528_NUM_GPHYS 4
-+
- static int mt7988_setup(struct dsa_switch *ds)
- {
- struct mt7530_priv *priv = ds->priv;
-+ int i;
-
- /* Reset the switch */
- reset_control_assert(priv->rstc);
-@@ drivers/net/dsa/mt7530.c: static int mt7988_setup(struct dsa_switch *ds)
- /* Reset the switch PHYs */
- mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_PHY_RST);
-
-+ /* The EN7528 LAN GPHYs advertise EEE by default, but negotiating EEE
-+ * with common link partners (e.g. Realtek GbE NICs) results in an
-+ * unstable link with dropped frames. Disable EEE advertisement on
-+ * them.
-+ */
-+ if (priv->id == ID_EN7528)
-+ for (i = EN7528_GPHY_BASE;
-+ i < EN7528_GPHY_BASE + EN7528_NUM_GPHYS; i++)
-+ mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN,
-+ MDIO_AN_EEE_ADV, 0);
-+
- return mt7531_setup_common(ds);
- }
-
@@ drivers/net/dsa/mt7530.c: const struct mt753x_info mt753x_table[] = {
.phy_write_c45 = mt7531_ind_c45_phy_write,
.mac_port_get_caps = en7581_mac_port_get_caps,

base-commit: fe3e786ef4eb6e47d2901f568a27bd920477bbe9

2.34.1