iommu/amd: Honor IVINFO[PAsize] for paging domains
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- v1 Latest2 patches 0 repliesNew
Patches in v1 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/2 | iommu/amd: Move page-table setup into init_pgtable_params()drivers/ | +47 | 0 replies | |
| 2/2 | iommu/amd: Adhere to IVINFO[PAsize] for output address limitsdrivers/ drivers/ drivers/ +1 more | +12 | 0 replies |
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Cover letter [PATCH 0/2] iommu/amd: Honor IVINFO[PAsize] for paging domains
The AMD IOMMU driver hardcodes a 52-bit output address size when it creates paging domains. This series honors the PAsize reported in ACPI IVRS IVinfo instead, so maps cannot exceed what firmware or a VM advertises. Patch 1 moves page-table setup into init_pgtable_params() after the IVHD walk, with no functional change intended. Patch 2 uses that helper for PAsize and applies it to paging domains.
Ankit Soni (2):
iommu/amd: Move page-table setup into init_pgtable_params() iommu/amd: Adhere to IVINFO[PAsize] for output address limits
drivers/iommu/amd/amd_iommu.h | 1 + drivers/iommu/amd/amd_iommu_types.h | 1 + drivers/iommu/amd/init.c | 95 ++++++++++++++++------------- drivers/iommu/amd/iommu.c | 4 +- 4 files changed, 58 insertions(+), 43 deletions(-)
base-commit: 90201351a862182bdabfc1ad1c97b1e1b6ed5931
Signature · 1 line
2.43.0