Fix SM6115 MDSS register access during runtime resume
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b4 am 179305118390.93309.15055947565850813746.sm6115-mdss-ahb-v2-0@michaelmcallister.orgVersions newest first · linked by author and title
- v2 Latest2 patches 0 repliesNew
- v12 patches 2 repliesSuperseded
Changes in v2 from the cover letter
- Remove blank lines between commit trailers.
- Add the received review tags.
Patches in v2 No applies recorded yet
| # | Subject and files | Size | Replies | Applied |
|---|---|---|---|---|
| 1/2 | dt-bindings: display: msm: sm6115-mdss: Add missing AHB clockDocumentation/ | +4 | 0 replies | |
| 2/2 | arm64: dts: qcom: sm6115: Add missing MDSS AHB clockarch/ | +2 | 0 replies |
Reviews trailers per patch
All 2 patches have a Reviewed-by or Acked-by.
| Patch | Krzysztof Kozlowski | Konrad Dybcio |
|---|---|---|
| 1/2 | R-b | |
| 2/2 | R-b |
Trailers given in replies are filled; those carried in the patches from earlier versions are outlined with dashes.
Cover letter [PATCH v2 0/2] Fix SM6115 MDSS register access during runtime resume
Hi,
This fixes garbled compressed scanout on my device (Moto G10, SM4250) after display power cycling. MDSS needs the DISPCC AHB clock before the DPU child resumes, so this adds it to the binding and shared SM6115 clock list. I tested this on 7.2.9 and power-cycled the display 20 times.
Changes in v2:
- Remove blank lines between commit trailers.
- Add the received review tags.
v1: https://lore.kernel.org/all/[email protected]/
Michael McAllister (2):
dt-bindings: display: msm: sm6115-mdss: Add missing AHB clock
arm64: dts: qcom: sm6115: Add missing MDSS AHB clock
.../devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml | 5 ++++- arch/arm64/boot/dts/qcom/sm6115.dtsi | 3 ++- 2 files changed, 6 insertions(+), 2 deletions(-)
base-commit: d053e38e614fb2e383b298ce8fc308a780d7f209
Signature · 1 line
2.39.5