Skip to contentSkip to conversation

msm: add SMP support for msm

PATCH Catalin Marinas 1 participant 1 message Dec 13, 2010 1 message not in the archive Arm Qualcomm mailing list

lore
Share & tools
lore

A message that is not in the archive (sent off-list or not yet received): -5043037405149418685@unknownmsgid

Catalin Marinas

author
#1 lore raw
Quoted 2 lines · On 13 December 2010 01:20, <[email protected]> wrote:
arch/arm/mach-msm/headsmp.S new file +0 -0

[...]

Quoted 5 lines
arch/arm/mach-msm/headsmp.S new file +5 -0
+ENTRY(msm_secondary_startup)
+ ? ? ? mrc ? ? p15, 0, r0, c0, c0, 5 ? @ MPIDR
+ ? ? ? and ? ? r0, r0, #15 ? ? ? ? ? ? @ What CPU am I
+ ? ? ? adr ? ? r4, 1f ? ? ? ? ? ? ? ? ?@ address of
+ ? ? ? ldmia ? r4, {r5, r6} ? ? ? ? ? ?@ load curr addr and pen_rel addr

arch/arm/mach-msm/headsmp.S

Quoted 10 lines
arch/arm/mach-msm/headsmp.S new file +10 -0
+ ? ? ? sub ? ? r4, r4, r5 ? ? ? ? ? ? ?@ determine virtual/phys offsets
+ ? ? ? add ? ? r6, r6, r4 ? ? ? ? ? ? ?@ apply
+pen:
+ ? ? ? wfe
+ ? ? ? dsb ? ? ? ? ? ? ? ? ? ? ? ? ? ? @ ensure subsequent access is
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? @ after event
+
+ ? ? ? ldr ? ? r7, [r6] ? ? ? ? ? ? ? ?@ pen_rel has cpu to remove from reset
+ ? ? ? cmp ? ? r7, r0 ? ? ? ? ? ? ? ? ?@ are we lucky?
+ ? ? ? bne ? ? pen

Is the primary CPU using SEV to wake the secondary from the WFE? I may have missed it.

Signature · 1 line
Catalin