ARM: dts: drop dw-mshc-ciu-div property from Exynos
Subsystems (3)
PATCH 6/7 ARM: dts: drop dw-mshc-ciu-div property from Exynos
As dw-mshc-ciu-div is strongly close to timing property, it is merged with each timing property.
Signed-off-by Seungwon Jeon <[email protected]>
--- .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 12 +++++------- arch/arm/boot/dts/exynos4412-odroidx.dts | 5 ++--- arch/arm/boot/dts/exynos4412-origen.dts | 5 ++--- arch/arm/boot/dts/exynos4412-trats2.dts | 5 ++--- arch/arm/boot/dts/exynos5250-arndale.dts | 10 ++++------ arch/arm/boot/dts/exynos5250-cros-common.dtsi | 15 ++++++--------- arch/arm/boot/dts/exynos5250-smdk5250.dts | 10 ++++------ arch/arm/boot/dts/exynos5420-arndale-octa.dts | 10 ++++------ arch/arm/boot/dts/exynos5420-smdk5420.dts | 10 ++++------ 9 files changed, 33 insertions(+), 49 deletions(-)
Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt +5 -7
@@ -19,10 +19,6 @@ Required Properties: - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420 specific extensions. -* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface - unit (ciu) clock. This property is applicable only for Exynos5 SoC's and - ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7. - * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value in transmit mode and CIU clock phase shift value in receive mode for single data rate mode operation. Refer notes below for the order of the cells and the
@@ -38,6 +34,9 @@ Required Properties: The order of the cells should be - First Cell: CIU clock phase shift value for tx mode. - Second Cell: CIU clock phase shift value for rx mode. + - Thrid Cell: Specifies the divider value for the card interface + unit (ciu) clock. This property is applicable only for Exynos5 SoC's and + ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7. Valid values for SDR and DDR CIU clock timing for Exynos5250: - valid value for tx phase shift and rx phase shift is 0 to 7.
@@ -73,9 +72,8 @@ Example: broken-cd; fifo-depth = <0x80>; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; slot@0 { reg = <0>;
arch/arm/boot/dts/exynos4412-odroidx.dts +2 -3
@@ -48,9 +48,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 0>; + samsung,dw-mshc-ddr-timing = <1 2 0>; slot@0 { reg = <0>;
arch/arm/boot/dts/exynos4412-origen.dts +2 -3
@@ -131,9 +131,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 0>; + samsung,dw-mshc-ddr-timing = <1 2 0>; slot@0 { reg = <0>;
arch/arm/boot/dts/exynos4412-trats2.dts +2 -3
@@ -451,9 +451,8 @@ card-detect-delay = <200>; vmmc-supply = <&vemmc_reg>; clock-frequency = <400000000>; - samsung,dw-mshc-ciu-div = <0>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 0>; + samsung,dw-mshc-ddr-timing = <1 2 0>; pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; pinctrl-names = "default"; status = "okay";
arch/arm/boot/dts/exynos5250-arndale.dts +4 -6
@@ -376,9 +376,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; vmmc-supply = <&mmc_reg>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
@@ -394,9 +393,8 @@ num-slots = <1>; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; vmmc-supply = <&mmc_reg>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
arch/arm/boot/dts/exynos5250-cros-common.dtsi +6 -9
@@ -251,9 +251,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>;
@@ -267,9 +266,8 @@ num-slots = <1>; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
@@ -285,9 +283,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; /* See board-specific dts files for pin setup */ slot@0 {
arch/arm/boot/dts/exynos5250-smdk5250.dts +4 -6
@@ -134,9 +134,8 @@ supports-highspeed; broken-cd; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
@@ -151,9 +150,8 @@ num-slots = <1>; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
arch/arm/boot/dts/exynos5420-arndale-octa.dts +4 -6
@@ -36,9 +36,8 @@ broken-cd; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <0 4>; - samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-sdr-timing = <0 4 3>; + samsung,dw-mshc-ddr-timing = <0 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
@@ -52,9 +51,8 @@ status = "okay"; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
arch/arm/boot/dts/exynos5420-smdk5420.dts +4 -6
@@ -36,9 +36,8 @@ broken-cd; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <0 4>; - samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-sdr-timing = <0 4 3>; + samsung,dw-mshc-ddr-timing = <0 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
@@ -52,9 +51,8 @@ status = "okay"; supports-highspeed; card-detect-delay = <200>; - samsung,dw-mshc-ciu-div = <3>; - samsung,dw-mshc-sdr-timing = <2 3>; - samsung,dw-mshc-ddr-timing = <1 2>; + samsung,dw-mshc-sdr-timing = <2 3 3>; + samsung,dw-mshc-ddr-timing = <1 2 3>; pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
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