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memcpy optimized with strd/ldrd

PATCH New Boojin Kim 2 participants 5 messages Mar 30, 2012 – Apr 26, 2012 1 message not in the archive

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Boojin Kim

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#1 lore raw

cover memcpy optimized with strd/ldrd

In reply to a message not in the archive
Quoted 5 lines · Nicolas Pitre

Here's my version. Lightly tested.
I have no A15 hardware to run any performance comparison though.

I'm reviewing and testing your patch. But, My other work disturbs to reviewing it. I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)

Quoted 5 lines

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#2 lore raw

cover memcpy optimized with strd/ldrd

Quoted 10 lines · Boojin Kim
Quoted 5 lines · Nicolas Pitre

Here's my version. Lightly tested.
I have no A15 hardware to run any performance comparison though.

I'm reviewing and testing your patch. But, My other work disturbs to reviewing it. I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)

FYI, it occurred to me that some corner cases might not be quite right with regards to alignment for the STRD instruction. It seems that the hardware on which I tested it (Marvell Dove CPU) apparently copes with misaligned SDRD's when they're still 32-bit aligned. So I need to run this code through a real validation harness on different hardware.

Nicolas

author
#3 lore raw

cover memcpy optimized with strd/ldrd

Quoted 9 lines · Nicolas Pitre
Quoted 8 lines
Quoted 4 lines

Here's my version. Lightly tested.
I have no A15 hardware to run any performance comparison though.

I'm reviewing and testing your patch. But, My other work disturbs to reviewing it. I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)

Quoted 5 lines

FYI, it occurred to me that some corner cases might not be quite right with regards to alignment for the STRD instruction. It seems that the hardware on which I tested it (Marvell Dove CPU) apparently copes with misaligned SDRD's when they're still 32-bit aligned. So I need to run this code through a real validation harness on different hardware.

It's sad, but the performance result wasn't better after adapting your patch. I think something on 1~3 patch brings performance degreasing. Thanks :)

Quoted 8 lines

Nicolas

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linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#4 lore raw

cover memcpy optimized with strd/ldrd

Quoted 11 lines · Boojin Kim
Quoted 9 lines · Nicolas Pitre
Quoted 8 lines
Quoted 4 lines

Here's my version. Lightly tested.
I have no A15 hardware to run any performance comparison though.

I'm reviewing and testing your patch. But, My other work disturbs to reviewing it. I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)

Quoted 8 lines
Quoted 5 lines

FYI, it occurred to me that some corner cases might not be quite right with regards to alignment for the STRD instruction. It seems that the hardware on which I tested it (Marvell Dove CPU) apparently copes with misaligned SDRD's when they're still 32-bit aligned. So I need to run this code through a real validation harness on different hardware.

It's sad, but the performance result wasn't better after adapting your patch. I think something on 1~3 patch brings performance degreasing.

If you could identify which patch is responsible that would be helpful.

Thanks.

Nicolas

author
#5 lore raw

cover memcpy optimized with strd/ldrd

Quoted 24 lines · Nicolas Pitre

Sent: Tuesday, April 03, 2012 11:49 PM
To: Boojin Kim
Cc: linux-arm-kernel at lists.infradead.org
Subject: RE: [PATCH 0/4] memcpy optimized with strd/ldrd

Quoted 17 lines · Boojin Kim
Quoted 14 lines · Nicolas Pitre
Quoted 8 lines
Quoted 4 lines

Here's my version. Lightly tested.
I have no A15 hardware to run any performance comparison though.

I'm reviewing and testing your patch. But, My other work disturbs to reviewing it. I will give you feedback soon within this week.
Wait a little more.
And, Thanks for your patches. :)

FYI, it occurred to me that some corner cases might not be quite right with regards to alignment for the STRD instruction. It seems that the hardware on which I tested it (Marvell Dove CPU) apparently copes with misaligned SDRD's when they're still 32-bit aligned. So I need to run this code through a real validation harness on different hardware.

Quoted 4 lines
Quoted 2 lines

It's sad, but the performance result wasn't better after adapting your patch. I think something on 1~3 patch brings performance degreasing.

If you could identify which patch is responsible that would be helpful.

Sorry for late response. I'm so busy these days. Y_Y
I checked your patches. And, the 1st patch makes performance drop.
Transmit time for 4KB memcpy is 489ns. After applying 1st patch, the transmit time is 578ns. Performance also drops on memcpy of other small size about 10%.
I wish this is helpful for you.
Thanks,

Quoted 10 lines

Thanks.

Nicolas

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