24xx dma patch

Please post the McBSP and changed audio related files for 24xx, once you get time to the list. Atelast McBSP code can be merged the git tree, as audio works with your 24xx custom board.

---Komal Shah
http://komalshah.blogspot.com/

__________________________________________
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Here's McBSP patch on omap24xx

Any comments are welcome.

p.s., Yes there's TSC mux settings for future use.

Regards,
Kyungmin Park

--

@@ -50,9 +50,22 @@ MUX_CFG_24XX("H19_24XX_I2C2_SDA",	0x114,
 /* Menelaus interrupt */
 MUX_CFG_24XX("W19_24XX_SYS_NIRQ",	0x12c,	0,	1,	1,	1)
 
+/* 24xx clocks */
+MUX_CFG_24XX("W14_24XX_SYS_CLKOUT",	0x137,	0,	1,	1,	1)
+
+/* 24xx McBSP */
+MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX",	0x124,	1,	1,	0,	1)
+MUX_CFG_24XX("R14_24XX_MCBSP2_FSX",	0x125,	1,	1,	0,	1)
+MUX_CFG_24XX("W15_24XX_MCBSP2_DR",	0x126,	1,	1,	0,	1)
+MUX_CFG_24XX("V15_24XX_MCBSP2_DX",	0x127,	1,	1,	0,	1)
+
 /* 24xx GPIO */
 MUX_CFG_24XX("Y20_24XX_GPIO60",		0x12c,	3,	0,	0,

1)
MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0,
1)
+MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
+
+/* TSC IRQ */
+MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)

};

@@ -35,7 +35,7 @@
 #ifdef CONFIG_MCBSP_DEBUG
 #define DBG(x...)	printk(x)
 #else
-#define DBG(x...)	do { } while (0)
+#define DBG(x...)			do { } while (0)
 #endif
 
 struct omap_mcbsp {

@@ -65,10 +65,19 @@ struct omap_mcbsp {
 };
 
 static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT];
+#ifdef CONFIG_ARCH_OMAP1
 static struct clk *mcbsp_dsp_ck = 0;
 static struct clk *mcbsp_api_ck = 0;
 static struct clk *mcbsp_dspxor_ck = 0;
-
+#endif
+#ifdef CONFIG_ARCH_OMAP2
+static struct clk *mcbsp1_ick = 0;
+static struct clk *mcbsp1_fck = 0;
+static struct clk *mcbsp2_ick = 0;
+static struct clk *mcbsp2_fck = 0;
+static struct clk *sys_ck = 0;
+static struct clk *sys_clkout = 0;
+#endif
 
 static void omap_mcbsp_dump_reg(u8 id)
 {

@@ -89,7 +98,6 @@ static void omap_mcbsp_dump_reg(u8 id)
 	DBG("***********************\n");
 }
 
-
 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id, struct

pt_regs *regs)
{
struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id);
@@ -110,7 +118,6 @@ static irqreturn_t omap_mcbsp_rx_irq_han
return IRQ_HANDLED;
}

-
static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) {
struct omap_mcbsp * mcbsp_dma_tx = (struct omap_mcbsp *)(data);
@@ -177,7 +184,7 @@ static int omap_mcbsp_check(unsigned int
return 0;
}

-	if (cpu_is_omap1510() || cpu_is_omap16xx()) {
+	if (cpu_is_omap1510() || cpu_is_omap16xx() || cpu_is_omap24xx()) {

if (id > OMAP_MAX_MCBSP_COUNT) {
printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't
exist\n", id + 1);
return -1;
@@ -188,6 +195,7 @@ static int omap_mcbsp_check(unsigned int
return -1;
}

+#ifdef CONFIG_ARCH_OMAP1
static void omap_mcbsp_dsp_request(void)
{
if (cpu_is_omap1510() || cpu_is_omap16xx()) {
@@ -216,6 +224,19 @@ static void omap_mcbsp_dsp_free(void)
clk_unuse(mcbsp_api_ck);
}
}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2
+static void omap2_mcbsp2_mux_setup(void)
+{
+ omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
+ omap_cfg_reg(R14_24XX_MCBSP2_FSX);
+ omap_cfg_reg(W15_24XX_MCBSP2_DR);
+ omap_cfg_reg(V15_24XX_MCBSP2_DX);
+ omap_cfg_reg(V14_24XX_GPIO117);
+ omap_cfg_reg(W14_24XX_SYS_CLKOUT);
+}
+#endif

int omap_mcbsp_request(unsigned int id)
{
@@ -224,12 +245,26 @@ int omap_mcbsp_request(unsigned int id)
if (omap_mcbsp_check(id) < 0)
return -EINVAL;

+#ifdef CONFIG_ARCH_OMAP1
/*
* On 1510, 1610 and 1710, McBSP1 and McBSP3
* are DSP public peripherals.
*/
if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
omap_mcbsp_dsp_request();
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2
+ if (cpu_is_omap24xx()) {
+ if (id == OMAP_MCBSP1) {
+ clk_use(mcbsp1_ick);
+ clk_use(mcbsp1_fck);
+ } else {
+ clk_use(mcbsp2_ick);
+ clk_use(mcbsp2_fck);
+ }
+ }
+#endif

spin_lock(&mcbsp[id].lock);
if (!mcbsp[id].free) {
@@ -274,8 +309,24 @@ void omap_mcbsp_free(unsigned int id)
if (omap_mcbsp_check(id) < 0)
return;

- if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
- omap_mcbsp_dsp_free();
+#ifdef CONFIG_ARCH_OMAP1
+ if (cpu_class_is_omap1()) {
+ if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
+ omap_mcbsp_dsp_free();
+ }
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2
+ if (cpu_is_omap24xx()) {
+ if (id == OMAP_MCBSP1) {
+ clk_unuse(mcbsp1_ick);
+ clk_unuse(mcbsp1_fck);
+ } else {
+ clk_unuse(mcbsp2_ick);
+ clk_unuse(mcbsp2_fck);
+ }
+ }
+#endif

spin_lock(&mcbsp[id].lock);
if (mcbsp[id].free) {
@@ -474,6 +525,9 @@ u32 omap_mcbsp_recv_word(unsigned int id
int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int
length)
{
int dma_tx_ch;
+ int src_port = 0;
+ int dest_port = 0;
+ int sync_dev = 0;

if (omap_mcbsp_check(id) < 0)
return -EINVAL;
@@ -490,20 +544,27 @@ int omap_mcbsp_xmit_buffer(unsigned int

init_completion(&(mcbsp[id].tx_dma_completion));

+ if (cpu_class_is_omap1()) {
+ src_port = OMAP_DMA_PORT_TIPB;
+ dest_port = OMAP_DMA_PORT_EMIFF;
+ }
+ if (cpu_is_omap24xx())
+ sync_dev = mcbsp[id].dma_tx_sync;
+
omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch,
OMAP_DMA_DATA_TYPE_S16, length >> 1, 1, OMAP_DMA_SYNC_ELEMENT,
- 0, 0);
+ sync_dev, 0);

omap_set_dma_dest_params(mcbsp[id].dma_tx_lch,
- OMAP_DMA_PORT_TIPB,
+ src_port,
OMAP_DMA_AMODE_CONSTANT, mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1, 0, 0);

omap_set_dma_src_params(mcbsp[id].dma_tx_lch,
- OMAP_DMA_PORT_EMIFF,
+ dest_port,
OMAP_DMA_AMODE_POST_INC,
buffer,
0, 0);
@@ -517,6 +578,9 @@ int omap_mcbsp_xmit_buffer(unsigned int
int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int
length)
{
int dma_rx_ch;
+ int src_port = 0;
+ int dest_port = 0;
+ int sync_dev = 0;

if (omap_mcbsp_check(id) < 0)
return -EINVAL;
@@ -533,20 +597,27 @@ int omap_mcbsp_recv_buffer(unsigned int

init_completion(&(mcbsp[id].rx_dma_completion));

+ if (cpu_class_is_omap1()) {
+ src_port = OMAP_DMA_PORT_TIPB;
+ dest_port = OMAP_DMA_PORT_EMIFF;
+ }
+ if (cpu_is_omap24xx())
+ sync_dev = mcbsp[id].dma_rx_sync;
+
omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch,
OMAP_DMA_DATA_TYPE_S16, length >> 1, 1, OMAP_DMA_SYNC_ELEMENT,
- 0, 0);
+ sync_dev, 0);

omap_set_dma_src_params(mcbsp[id].dma_rx_lch,
- OMAP_DMA_PORT_TIPB,
+ src_port,
OMAP_DMA_AMODE_CONSTANT, mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1, 0, 0);

omap_set_dma_dest_params(mcbsp[id].dma_rx_lch,
- OMAP_DMA_PORT_EMIFF,
+ dest_port,
OMAP_DMA_AMODE_POST_INC, buffer,
0, 0);
@@ -691,6 +762,23 @@ static const struct omap_mcbsp_info mcbs
};
#endif

+#if defined(CONFIG_ARCH_OMAP24XX)
+static const struct omap_mcbsp_info mcbsp_24xx[] = {
+ [0] = { .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
+ .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
+ .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
+ .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
+ .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
+ },
+ [1] = { .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
+ .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
+ .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
+ .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
+ .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
+ },
+};
+#endif
+
static int __init omap_mcbsp_init(void)
{
int mcbsp_count = 0, i;
@@ -698,6 +786,7 @@ static int __init omap_mcbsp_init(void)

printk("Initializing OMAP McBSP system\n");

+#ifdef CONFIG_ARCH_OMAP1
mcbsp_dsp_ck = clk_get(0, "dsp_ck");
if (IS_ERR(mcbsp_dsp_ck)) {
printk(KERN_ERR "mcbsp: could not acquire dsp_ck
handle.\n");
@@ -713,6 +802,29 @@ static int __init omap_mcbsp_init(void)
printk(KERN_ERR "mcbsp: could not acquire dspxor_ck
handle.\n");
return PTR_ERR(mcbsp_dspxor_ck);
}
+#endif
+#ifdef CONFIG_ARCH_OMAP2
+ mcbsp1_ick = clk_get(0, "mcbsp1_ick");
+ if (IS_ERR(mcbsp1_ick)) {
+ printk(KERN_ERR "mcbsp: could not acquire mcbsp1_ick
handle.\n");
+ return PTR_ERR(mcbsp1_ick);
+ }
+ mcbsp1_fck = clk_get(0, "mcbsp1_fck");
+ if (IS_ERR(mcbsp1_fck)) {
+ printk(KERN_ERR "mcbsp: could not acquire mcbsp1_fck
handle.\n");
+ return PTR_ERR(mcbsp1_fck);
+ }
+ mcbsp2_ick = clk_get(0, "mcbsp2_ick");
+ if (IS_ERR(mcbsp2_ick)) {
+ printk(KERN_ERR "mcbsp: could not acquire mcbsp2_ick
handle.\n");
+ return PTR_ERR(mcbsp2_ick);
+ }
+ mcbsp2_fck = clk_get(0, "mcbsp2_fck");
+ if (IS_ERR(mcbsp2_fck)) {
+ printk(KERN_ERR "mcbsp: could not acquire mcbsp2_fck
handle.\n");
+ return PTR_ERR(mcbsp2_fck);
+ }
+#endif

#ifdef CONFIG_ARCH_OMAP730
if (cpu_is_omap730()) {
@@ -732,6 +844,19 @@ static int __init omap_mcbsp_init(void)
mcbsp_count = ARRAY_SIZE(mcbsp_1610);
}
#endif
+#if defined(CONFIG_ARCH_OMAP24XX)
+ if (cpu_is_omap24xx()) {
+ mcbsp_info = mcbsp_24xx;
+ mcbsp_count = ARRAY_SIZE(mcbsp_24xx);
+
+ /* REVISIT: where's the right place? */
+ omap2_mcbsp2_mux_setup();
+ sys_ck = clk_get(0, "sys_ck");
+ sys_clkout = clk_get(0, "sys_clkout");
+ clk_set_parent(sys_clkout, sys_ck);
+ clk_use(sys_clkout);
+ }
+#endif
for (i = 0; i < OMAP_MAX_MCBSP_COUNT ; i++) {
if (i >= mcbsp_count) {
mcbsp[i].io_base = 0;
@@ -754,7 +879,6 @@ static int __init omap_mcbsp_init(void)
return 0;
}

-
arch_initcall(omap_mcbsp_init);

EXPORT_SYMBOL(omap_mcbsp_config);

b/include/asm-arm/arch-omap/irqs.h

@@ -242,6 +242,10 @@
 #define INT_24XX_GPIO_BANK2	30
 #define INT_24XX_GPIO_BANK3	31
 #define INT_24XX_GPIO_BANK4	32
+#define INT_24XX_MCBSP1_IRQ_TX	59
+#define INT_24XX_MCBSP1_IRQ_RX	60
+#define INT_24XX_MCBSP2_IRQ_TX	62
+#define INT_24XX_MCBSP2_IRQ_RX	63
 
 /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
  * 16 MPUIO lines */

b/include/asm-arm/arch-omap/mcbsp.h

OMAP_MCBSP_REG_##reg)
#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) +
OMAP_MCBSP_REG_##reg)

+
/************************** McBSP SPCR1 bit definitions
***********************/
#define RRST 0x0001
#define RRDY 0x0002

b/include/asm-arm/arch-omap/mux.h

@@ -407,9 +407,21 @@ enum omap24xx_index {
 	/* 24xx Menelaus interrupt */
 	W19_24XX_SYS_NIRQ,
 
+	/* 24xx clock */
+	W14_24XX_SYS_CLKOUT,
+
+	/* 242X McBSP */
+	Y15_24XX_MCBSP2_CLKX,
+	R14_24XX_MCBSP2_FSX,
+	W15_24XX_MCBSP2_DR,
+	V15_24XX_MCBSP2_DX,
+
 	/* 24xx GPIO */
 	Y20_24XX_GPIO60,
 	M15_24XX_GPIO92,
+	V14_24XX_GPIO117,
+
+	P20_24XX_TSC_IRQ,
 };
 
 #ifdef	CONFIG_OMAP_MUX

Thanks, updated for clk_enable and manually merged the mux entries. Can you please verify?

Tony

Ooops. I should have replied to this patch earlier. It already broke innovator1510 and 730, because of #ifdef in register defines in mcbsp.h.

It is better to have OMAP2_ prefix for McBSP registers, as per my first McBSP patch. I will fix this and submit the patch.

Apart from this, McBSP.c getting started looking ugly because of lots of #ifdefers, it is better to have platform_data/driver support for this McBSP apis _or_ a small framework.

---Komal Shah
http://komalshah.blogspot.com/

__________________________________________________
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Yeah, we should get rid of the ifdefs... With the mux.h now common for omap1 and omap2, the ifdefs around muxing should not be needed any longer.

OK

Yes.

Tony

Hi

This patch enable OMAP sound on omap24xx
To test omap sound, you first have to patch the first spi patch from komal shah not the latest spi patch.

It also adds 'OSS L/R Channel Interchange fix' on tsc2101

Any comments are welcome.

Regards,
Kyungmin Park

P.S., There's some problem when running qtopia on H4.
At the end of mediaplay. we can't stop audio, exactly audio_sync why? But madplay is working well :)

--

@@ -13,14 +13,18 @@ config SOUND_OMAP
 
 config SOUND_OMAP_TSC2101
 	tristate "TSC2101 Stereo Codec"
-	depends on SOUND_OMAP && ( MACH_OMAP_H2 || MACH_OMAP_H3 )
-	select OMAP_TSC2101
-	select OMAP_UWIRE if ARCH_OMAP
+	depends on SOUND_OMAP && ( MACH_OMAP_H2 || MACH_OMAP_H3 ||

MACH_OMAP_H4)
+ select OMAP_TSC2101 if ( MACH_OMAP_H2 || MACH_OMAP_H3 )
+ select OMAP_UWIRE if ARCH_OMAP1
---help---
Tsc2101 Audio Codec Driver for OMAP will be enabled. Will also Enable the following:
+ case OMAP1:
1. uWire Driver based on Platform
2. TSC2101 Glue driver

+	  case OMAP2:
+	  1. McSPI Driver based on Platform
+	  2. TSC2101 Glue driver

config SOUND_OMAP_AIC23
tristate "AIC23 Stereo Codec"

b/sound/oss/omap-audio-dma-intfc.c

@@ -701,12 +701,25 @@ static int audio_set_dma_params_play(int
 	int dt = 0x1;		/* data type 16 */
 	int cen = 32;		/* Stereo */
 	int cfn = dma_size / (2 * cen);
+	unsigned long dest_start;
+	int dest_port = 0;
+	int sync_dev = 0;
+
 	FN_IN;
-	omap_set_dma_dest_params(channel, 0x05, 0x00,
-				 (OMAP1610_MCBSP1_BASE + 0x806),
-				 0, 0);
-	omap_set_dma_src_params(channel, 0x00, 0x01, dma_ptr, 0, 0);
-	omap_set_dma_transfer_params(channel, dt, cen, cfn, 0x00, 0, 0);
+
+	if (cpu_is_omap16xx()) {
+		dest_start = (OMAP1610_MCBSP1_BASE + 0x806);
+		dest_port = OMAP_DMA_PORT_MPUI;
+	}
+	if (cpu_is_omap24xx()) {
+		dest_start = AUDIO_MCBSP_DATAWRITE;
+		sync_dev = AUDIO_DMA_TX;
+	}
+
+	omap_set_dma_dest_params(channel, dest_port,

OMAP_DMA_AMODE_CONSTANT, dest_start, 0, 0);
+ omap_set_dma_src_params(channel, 0, OMAP_DMA_AMODE_POST_INC,
dma_ptr, 0, 0);
+ omap_set_dma_transfer_params(channel, dt, cen, cfn,
OMAP_DMA_SYNC_ELEMENT, sync_dev, 0);
+
FN_OUT(0);
return 0;
}
@@ -717,12 +730,27 @@ static int audio_set_dma_params_capture(
int dt = 0x1; /* data type 16 */
int cen = 16; /* mono */
int cfn = dma_size / (2 * cen);
+ unsigned long src_start;
+ int src_port = 0;
+ int sync_dev = 0;
+ int src_sync = 0;
+
FN_IN;
- omap_set_dma_src_params(channel, 0x05, 0x00,
- (OMAP1610_MCBSP1_BASE + 0x802),
- 0, 0);
- omap_set_dma_dest_params(channel, 0x00, 0x01, dma_ptr, 0, 0);
- omap_set_dma_transfer_params(channel, dt, cen, cfn, 0x00, 0, 0);
+
+ if (cpu_is_omap16xx()) {
+ src_start = (OMAP1610_MCBSP1_BASE + 0x802);
+ src_port = OMAP_DMA_PORT_MPUI;
+ }
+ if (cpu_is_omap24xx()) {
+ src_start = AUDIO_MCBSP_DATAREAD;
+ sync_dev = AUDIO_DMA_RX;
+ src_sync = 1;
+ }
+
+ omap_set_dma_src_params(channel, src_port, OMAP_DMA_AMODE_CONSTANT,
src_start, 0, 0);
+ omap_set_dma_dest_params(channel, 0, OMAP_DMA_AMODE_POST_INC,
dma_ptr, 0, 0);
+ omap_set_dma_transfer_params(channel, dt, cen, cfn,
OMAP_DMA_SYNC_ELEMENT, sync_dev, src_sync);
+
FN_OUT(0);
return 0;
}
@@ -732,10 +760,10 @@ static int audio_start_dma_chain(audio_s
int channel = s->lch[s->dma_q_head];
FN_IN;
if (!s->started) {
- s->hw_stop(); /* stops McBSP Interface */
+ s->hw_stop(); /* stops McBSP Interface */
omap_start_dma(channel);
s->started = 1;
- s->hw_start(); /* start McBSP interface */
+ s->hw_start(); /* start McBSP interface */
}
/* else the dma itself will progress forward with out our help */ FN_OUT(0);
@@ -850,8 +878,9 @@ static void sound_dma_irq_handler(int so
DPRINTK("lch=%d,status=0x%x, dma_status=%d, data=%p\n",
sound_curr_lch,
ch_status, dma_status, data);

- if (dma_status & (DCSR_ERROR)) {
- OMAP_DMA_CCR_REG(sound_curr_lch) &= ~DCCR_EN;
+ if (dma_status) {
+ if (cpu_is_omap16xx() && (dma_status & (DCSR_ERROR)))
+ OMAP_DMA_CCR_REG(sound_curr_lch) &= ~DCCR_EN;
ERR("DCSR_ERROR!\n");
FN_OUT(-1);
return;

@@ -48,9 +48,10 @@
 #include "omap-audio.h"
 #include "omap-audio-dma-intfc.h"
 #include <asm/arch/mcbsp.h>
-#if CONFIG_ARCH_OMAP16XX
+#ifdef CONFIG_ARCH_OMAP16XX
 #include <../drivers/ssi/omap-uwire.h>
 #include <asm/arch/dsp_common.h>
+#elif defined(CONFIG_ARCH_OMAP24XX)
 #else
 #error "Unsupported configuration"
 #endif

@@ -70,12 +71,10 @@
 
 #define CODEC_NAME		 "TSC2101"
 
-#if CONFIG_ARCH_OMAP16XX
+#ifdef CONFIG_ARCH_OMAP16XX
 #define PLATFORM_NAME "OMAP16XX"
-#endif
-
-#if CONFIG_ARCH_OMAP16XX
-#define OMAP_DSP_BASE        0xE0000000
+#elif defined(CONFIG_ARCH_OMAP24XX)
+#define PLATFORM_NAME "OMAP2"
 #endif
 
 /* Define to set the tsc as the master w.r.t McBSP */

@@ -90,9 +89,9 @@
 #define LEAVE_CS 			          0x80
 
 /* Select the McBSP For Audio */
-#if CONFIG_ARCH_OMAP16XX
-#define AUDIO_MCBSP                   OMAP_MCBSP1
-#else
+/* 16XX is MCBSP1 and 24XX is MCBSP2*/
+/* see include/asm-arm/arch-omap/mcbsp.h */
+#ifndef AUDIO_MCBSP
 #error "UnSupported Configuration"
 #endif
 

@@ -147,16 +146,32 @@
 
 /***************************** Data Structures

**********************************/

+static int audio_ifc_start(void)
+{
+ omap_mcbsp_start(AUDIO_MCBSP);
+ return 0;
+}
+
+static int audio_ifc_stop(void)
+{
+ omap_mcbsp_stop(AUDIO_MCBSP);
+ return 0;
+}
+
static audio_stream_t output_stream = {
- .id = "TSC2101 out",
- .dma_dev = OMAP_DMA_MCBSP1_TX,
- .input_or_output = FMODE_WRITE
+ .id = "TSC2101 out",
+ .dma_dev = AUDIO_DMA_TX,
+ .input_or_output = FMODE_WRITE,
+ .hw_start = audio_ifc_start,
+ .hw_stop = audio_ifc_stop,
};

static audio_stream_t input_stream = {
- .id = "TSC2101 in",
- .dma_dev = OMAP_DMA_MCBSP1_RX,
- .input_or_output = FMODE_READ
+ .id = "TSC2101 in",
+ .dma_dev = AUDIO_DMA_RX,
+ .input_or_output = FMODE_READ,
+ .hw_start = audio_ifc_start,
+ .hw_stop = audio_ifc_stop,
};

static int audio_dev_id, mixer_dev_id;
@@ -227,9 +242,9 @@ static struct omap_mcbsp_reg_cfg initial
.srgr2 = GSYNC | CLKSP | FSGM | FPER(31),

/* platform specific initialization */
-#if CONFIG_MACH_OMAP_H2
+#ifdef CONFIG_MACH_OMAP_H2
.pcr0 = CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP,
-#elif CONFIG_MACH_OMAP_H3
+#elif defined(CONFIG_MACH_OMAP_H3) || defined(CONFIG_MACH_OMAP_H4)

#ifndef TSC_MASTER
.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,

Pushing today, thanks.

Tony

I meant I pushed the other one with correct subject, not this one.

Tony