I have a question about SPI gpio bit-bang driver
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--- On Fri, 6/25/10, <[email protected]> wrote:
Subject: I have a question about SPI gpio bit-bang driver
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I wanna add the spi device using SPI bitbang driver in the drivers/spi/spi_gpio.c.
but, the current SPI bit-bang driver may support only one bus(if, bus means physically one MOSI, MISO pin-pair), and many channel (if channel means physically one CS or EN pin in the same MOSI, MISO pin-pair). exactly, when the board need more SPI bus for bit-banging, the current dosen't support this.
is it right??
NOT RIGHT. Doesn't a comment up top say how tosupport multiple busses (MOSI/MISO/SCK andbus number) by including that C source file withminor configuration #defines?
The issue is that each bus needs its own uniquetight bitbanging TXRX loop ... configure those, andmost of the rest is generic/sharable.
I've certainly built systems with multiple bitbangedSPI-gpio drivers ... where each TXRX loop wasonly a few instructions, writing right to the hardwareGPIO registers as fast as the SoC could go.
I think the driver need to change the bus number when registering the spi board info, like this, spi_register_board_info(xxx_board_info, ARRAY_SIZE(xxx_board_info));
-> spi_register_board_info(BUSNUM, xxx_board_info, ARRAY_SIZE(xxx_board_info));
Of course, just like the GPIO numbers it should use.
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