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hyperthreading scheduler improvement

PATCH In review Robert Love 2 participants 6 messages Aug 26, 2002

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#0 lore raw

PATCH 1/1 hyperthreading scheduler improvement

Linus,

This patch implements a per-arch load balancing scheme for P4s to better balance across the virtual CPUs (e.g. prefer fully unused CPUs to a single available HT unit). This is the same logic in 2.4-ac, 2.4-aa, etc.

This patch uses the previously posted per-arch load balancing infrastructure.

The new logic is keyed off of a new CONFIG_X86_HYPERTHREADING value which is currently set off of CONFIG_MPENTIUM4. Thus, only kernels compiled for P4s will receive the new logic. It is safe to make the code available to all x86s, however.

As I am not fortunate enough to have dual Xeons at my disposal, this patch is largely untested for performance, although it is present in -aa and -ac. I suspect this could show very acceptable performance gains.

Robert Love

arch/i386/config.in +1 -0
diff -urN linux-2.5.31/arch/i386/config.in linux/arch/i386/config.in
@@ -103,6 +103,7 @@
    define_bool CONFIG_X86_TSC y
    define_bool CONFIG_X86_GOOD_APIC y
    define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
+   define_bool CONFIG_X86_HYPERTHREADING y
 fi
 if [ "$CONFIG_MK6" = "y" ]; then
    define_int  CONFIG_X86_L1_CACHE_SHIFT 5
include/asm-i386/processor.h +2 -0
diff -urN linux-2.5.31/include/asm-i386/processor.h linux/include/asm-i386/processor.h
@@ -488,4 +488,6 @@
 
 #endif
 
+#define ARCH_HAS_SMP_BALANCE
+
 #endif /* __ASM_I386_PROCESSOR_H */
include/asm-i386/smp_balance.h +55 -0

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#1 lore raw
Quoted 6 lines · Robert Love

Linus,

This patch implements a per-arch load balancing scheme for P4s to better balance across the virtual CPUs (e.g. prefer fully unused CPUs to a single available HT unit). This is the same logic in 2.4-ac, 2.4-aa, etc.

This patch is disabled in -ac because it caused crashes for some users

#2 lore raw
Quoted 1 line · Alan Cox

This patch is disabled in -ac because it caused crashes for some users

I noticed - I actually got around to doing these patches because I was trying to find a solution to that problem. :)

Do you think it could be some odd behavior on non-P4 x86 SMP systems? Maybe sparse CPU ids?

At least for now, this 2.5 patch is P4-only.

Robert Love

#3 lore raw
Quoted 4 lines · Robert Love

Do you think it could be some odd behavior on non-P4 x86 SMP systems? Maybe sparse CPU ids?

At least for now, this 2.5 patch is P4-only.

It crashes on P4 systems

#4 lore raw
Quoted 1 line · Alan Cox

It crashes on P4 systems

Hm, we must be doing some silly, then...

Similar logic is even in the stock 2.4 scheduler, in reschedule_idle()...

Robert Love

#5 lore raw
In reply to Robert Love

On Mon, 2002-08-26 at 16:05, Robert Love wrote:

Linus,

Quoted 7 lines

This patch implements a per-arch load balancing scheme for P4s to better balance across the virtual CPUs (e.g. prefer fully unused CPUs to a single available HT unit). This is the same logic in 2.4-ac, 2.4-aa, etc.

This patch uses the previously posted per-arch load balancing infrastructure.

This is an updated version, to use the new asm/sched.h infrastructure hch suggested (see previous patch).

Robert Love

arch/i386/config.in +1 -0
diff -urN linux-dogmeat/arch/i386/config.in linux/arch/i386/config.in
@@ -103,6 +103,7 @@
    define_bool CONFIG_X86_TSC y
    define_bool CONFIG_X86_GOOD_APIC y
    define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
+   define_bool CONFIG_X86_HYPERTHREADING y
 fi
 if [ "$CONFIG_MK6" = "y" ]; then
    define_int  CONFIG_X86_L1_CACHE_SHIFT 5
include/asm-i386/sched.h +50 -2

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