mpc83xx: Add support for the display of reset status
PATCH 1/1 mpc83xx: Add support for the display of reset status
From: Dave Liu <[email protected]>
83xx processor family has many reset sources, such as power on reset, software hard reset, software soft reset, JTAG, bus monitor, software watchdog, check stop reset, external hard reset, external software reset. sometimes, to figure out the fault of system, we need to know the cause of reset early before the prompt of u-boot present.
--- cpu/mpc83xx/cpu_init.c | 36 ++++++++++++++++++++++++++++++++++++ include/common.h | 2 ++ lib_ppc/board.c | 6 ++++-- 3 files changed, 42 insertions(+), 2 deletions(-)
cpu/mpc83xx/cpu_init.c +36 -0
@@ -247,3 +247,39 @@ int cpu_init_r (void)#endif return 0 ; } + +/* +* Figure out the cause of the reset +*/ +int prt_83xx_rsr (void ) +{ +static struct { +ulong mask; +char *desc; + } bits[] = { + { +RSR_SWSR ,"Software Soft" }, { +RSR_SWHR ,"Software Hard" }, { +RSR_JSRS ,"JTAG Soft" }, { +RSR_CSHR ,"Check Stop" }, { +RSR_SWRS ,"Software Watchdog" }, { +RSR_BMRS ,"Bus Monitor" }, { +RSR_SRS ,"External/Internal Soft" }, { +RSR_HRS ,"External/Internal Hard" } + }; +static int n =sizeof bits /sizeof bits[0 ]; +ulong rsr = gd->reset_status; +int i; +char *sep; + +puts ("Reset Status:" ); + + sep =" " ; +for (i =0 ; i < n; i++) +if (rsr & bits[i].mask) { +printf ("%s%s" , sep, bits[i].desc); + sep =", " ; + } +puts ("\n\n" ); +return 0 ; +}
include/common.h +2 -0
@@ -511,6 +511,8 @@ void cpu_init_f (void);int cpu_init_r (void );#if defined(CONFIG_8260 )int prt_8260_rsr (void ); +#elif defined(CONFIG_MPC83XX ) +int prt_83xx_rsr (void );#endif /* $(CPU)/interrupts.c */
lib_ppc/board.c +4 -2
@@ -309,7 +309,9 @@ init_fnc_t *init_sequence[] = { prt_8260_rsr, prt_8260_clks,#endif /* CONFIG_8260 */ - +#if defined(CONFIG_MPC83XX ) + prt_83xx_rsr, +#endif checkcpu,#if defined(CONFIG_MPC5xxx) prt_mpc5xxx_clks,
@@ -376,7 +378,7 @@ void board_init_f (ulong bootflag)/* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("" : : :"memory" ); -#if !defined(CONFIG_CPM2 ) +#if !defined(CONFIG_CPM2 ) && !defined(CONFIG_MPC83XX )/* Clear initial global data */ memset ((void *) gd,0 ,sizeof (gd_t));#endif
Signature · 1 line
1.5.2.GIT
PATCH 1/1 mpc83xx: Add support for the display of reset status
Quoted 9 lines · Dave Liu
From: Dave Liu <[email protected]>
83xx processor family has many reset sources, such as power on reset, software hard reset, software soft reset, JTAG, bus monitor, software watchdog, check stop reset, external hard reset, external software reset. sometimes, to figure out the fault of system, we need to know the cause of reset early before the prompt of u-boot present.
How do you detect power on reset? I have looked for that but the rsr reg does not seem to support that and I really want to detect this.
Quoted 89 lines
Signed-off-by Dave Liu <[email protected]>--- cpu/mpc83xx/cpu_init.c | 36 ++++++++++++++++++++++++++++++++++++ include/common.h | 2 ++ lib_ppc/board.c | 6 ++++-- 3 files changed, 42 insertions(+), 2 deletions(-)cpu/mpc83xx/cpu_init.c +36
-0@@ -247,3 +247,39 @@ int cpu_init_r (void)#endif return 0 ; } + +/* +* Figure out the cause of the reset +*/ +int prt_83xx_rsr (void ) +{ +static struct { +ulong mask; +char *desc; + } bits[] = { + { +RSR_SWSR ,"Software Soft" }, { +RSR_SWHR ,"Software Hard" }, { +RSR_JSRS ,"JTAG Soft" }, { +RSR_CSHR ,"Check Stop" }, { +RSR_SWRS ,"Software Watchdog" }, { +RSR_BMRS ,"Bus Monitor" }, { +RSR_SRS ,"External/Internal Soft" }, { +RSR_HRS ,"External/Internal Hard" } + }; +static int n =sizeof bits /sizeof bits[0 ]; +ulong rsr = gd->reset_status; +int i; +char *sep; + +puts ("Reset Status:" ); + + sep =" " ; +for (i =0 ; i < n; i++) +if (rsr & bits[i].mask) { +printf ("%s%s" , sep, bits[i].desc); + sep =", " ; + } +puts ("\n\n" ); +return 0 ; +}include/common.h +2
-0@@ -511,6 +511,8 @@ void cpu_init_f (void);int cpu_init_r (void );#if defined(CONFIG_8260 )int prt_8260_rsr (void ); +#elif defined(CONFIG_MPC83XX ) +int prt_83xx_rsr (void );#endif /* $(CPU)/interrupts.c */ lib_ppc/board.c +4
-2@@ -309,7 +309,9 @@ init_fnc_t *init_sequence[] = { prt_8260_rsr, prt_8260_clks,#endif /* CONFIG_8260 */ - +#if defined(CONFIG_MPC83XX ) + prt_83xx_rsr, +#endif checkcpu,#if defined(CONFIG_MPC5xxx) prt_mpc5xxx_clks,@@ -376,7 +378,7 @@ void board_init_f (ulong bootflag)/* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("" : : :"memory" ); -#if !defined(CONFIG_CPM2 ) +#if !defined(CONFIG_CPM2 ) && !defined(CONFIG_MPC83XX )/* Clear initial global data */ memset ((void *) gd,0 ,sizeof (gd_t));#endif
PATCH 1/1 mpc83xx: Add support for the display ofreset status
Quoted 11 lines
Quoted 7 lines
83xx processor family has many reset sources, such as power on reset, software hard reset, software soft reset, JTAG, bus monitor, software watchdog, check stop reset, external hard reset, external software reset. sometimes, to figure out the fault of system, we need to know the cause of reset early before the prompt of u-boot present.
How do you detect power on reset? I have looked for that but the rsr reg does not seem to support that and I really want to detect this.
Usually, if all of these status bits of rsr is zero, consider this as power on reset.
- d
PATCH 1/1 mpc83xx: Add support for the display ofreset status
Quoted 8 lines · On Mon, 2007-06-25 at 18:03 +0800, Liu Dave-r63238 wrote:
Quoted 8 lines
Quoted 7 lines
83xx processor family has many reset sources, such as power on reset, software hard reset, software soft reset, JTAG, bus monitor, software watchdog, check stop reset, external hard reset, external software reset. sometimes, to figure out the fault of system, we need to know the cause of reset early before the prompt of u-boot present.
Quoted 6 lines
Quoted 3 lines
How do you detect power on reset? I have looked for that but the rsr reg does not seem to support that and I really want to detect this.
Usually, if all of these status bits of rsr is zero, consider this as power on reset.
The status bits you check in your patch? This sounds a bit fragile as you don't check all of them. Also if there is a double reset, you will miss the power on reset event as the second reset may set some bits in rsr.
Jocke