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mpc83xx: Remove cache config from config.h

PATCH New Dave Liu 1 participant 1 message Jan 10, 2008

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Dave Liu

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PATCH 2/8 mpc83xx: Remove cache config from config.h

clean up the cache config from configs.h of board

---
 include/configs/MPC8313ERDB.h |    5 -----
 include/configs/MPC8323ERDB.h |    9 ---------
 include/configs/MPC832XEMDS.h |    9 ---------
 include/configs/MPC8349EMDS.h |    7 -------
 include/configs/MPC8349ITX.h  |    9 ---------
 include/configs/MPC8360EMDS.h |    9 ---------
 include/configs/MPC837XEMDS.h |    9 ---------
 include/configs/TQM834x.h     |    9 ---------
 include/configs/sbc8349.h     |    7 -------
 9 files changed, 0 insertions(+), 73 deletions(-)
include/configs/MPC8313ERDB.h +0 -5
index 7bc4e27..455bbe0 100644
@@ -386,11 +386,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		16384
-#define CFG_CACHELINE_SIZE	32
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-
 #define CFG_RCWH_PCIHOST 0x80000000	/* PCIHOST  */
 
 #ifdef CFG_66MHZ
include/configs/MPC8323ERDB.h +0 -9
index 564de02..7831a2f 100644
@@ -423,15 +423,6 @@
 #define CFG_HID2		HID2_HBE
 
 /*
- * Cache Config
- */
-#define CFG_DCACHE_SIZE		16384
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value */
-#endif
-
-/*
  * MMU Setup
  */
 
include/configs/MPC832XEMDS.h +0 -9
index a48b311..1bbd0f9 100644
@@ -482,15 +482,6 @@
 #define CFG_HID2		HID2_HBE
 
 /*
- * Cache Config
- */
-#define CFG_DCACHE_SIZE		16384
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value */
-#endif
-
-/*
  * MMU Setup
  */
 
include/configs/MPC8349EMDS.h +0 -7
index 03409bb..437a9a5 100644
@@ -527,13 +527,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 #define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST  */
 
 #if 1 /*528/264*/
include/configs/MPC8349ITX.h +0 -9
index 49dc0de..48c2736 100644
@@ -487,15 +487,6 @@ boards, we say we have two, but don't display a message if we find only one. */
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/*
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/* log2 of the above value */
-#endif
-
 #define CFG_HRCW_LOW (\
 	HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
 	HRCWL_DDR_TO_SCB_CLK_1X1 |\
include/configs/MPC8360EMDS.h +0 -9
index fedb8a9..1a50741 100644
@@ -512,15 +512,6 @@
 #define CFG_HID2		HID2_HBE
 
 /*
- * Cache Config
- */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5 /*log base 2 of the above value */
-#endif
-
-/*
  * MMU Setup
  */
 
include/configs/MPC837XEMDS.h +0 -9
index 0958e6b..46fc239 100644
@@ -459,15 +459,6 @@
 #define CFG_HID2		HID2_HBE
 
 /*
- * Cache Config
- */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5 /*log base 2 of the above value */
-#endif
-
-/*
  * MMU Setup
  */
 
include/configs/TQM834x.h +0 -9
index 0147252..8ef3f09 100644
@@ -378,15 +378,6 @@ extern int tqm834x_num_flash_banks;
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/*
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 #define CFG_HRCW_LOW (\
 	HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
 	HRCWL_DDR_TO_SCB_CLK_1X1 |\
include/configs/sbc8349.h +0 -7
index 9efe3c4..4cc4ff1 100644
@@ -490,13 +490,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 #define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST  */
 
 #if 1 /*528/264*/
Signature · 1 line
1.5.3.5.643.g40e25