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Make pixis_set_sgmii more general to support MPC85xx boards.

PATCH New Jason Jin 4 participants 12 messages Oct 10, 2008 – Oct 14, 2008

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Jason Jin

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#0 lore raw

PATCH 1/4 Make pixis_set_sgmii more general to support MPC85xx boards.

From: Liu Yu <[email protected]>

The pixis sgmii command depend on the FPGA support on the board, some 85xx boards support SGMII riser card but did not support this command, define CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.

Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and PIXIS_VCFGEN1_MASK in header file for both boards.

Signed-off-by Liu Yu <[email protected]>
---
 board/freescale/common/pixis.c |   22 +++++++++++++++++++---
 include/configs/MPC8544DS.h    |    3 +++
 2 files changed, 22 insertions(+), 3 deletions(-)
board/freescale/common/pixis.c +19 -3
index b5a0e84..978a255 100644
@@ -283,7 +283,7 @@ U_BOOT_CMD(
 	   "diswd	- Disable watchdog timer \n",
 	   NULL);
 
-#ifdef CONFIG_FSL_SGMII_RISER
+#ifdef CONFIG_PIXIS_SGMII_CMD
 int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	int which_tsec = -1;

@@ -295,17 +295,33 @@ int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			which_tsec = simple_strtoul(argv[1], NULL, 0);
 
 	switch (which_tsec) {
+#ifdef CONFIG_TSEC1
 	case 1:
 		mask = PIXIS_VSPEED2_TSEC1SER;
 		switch_mask = PIXIS_VCFGEN1_TSEC1SER;
 		break;
+#endif
+#ifdef CONFIG_TSEC2
+	case 2:
+		mask = PIXIS_VSPEED2_TSEC2SER;
+		switch_mask = PIXIS_VCFGEN1_TSEC2SER;
+		break;
+#endif
+#ifdef CONFIG_TSEC3
 	case 3:
 		mask = PIXIS_VSPEED2_TSEC3SER;
 		switch_mask = PIXIS_VCFGEN1_TSEC3SER;
 		break;
+#endif
+#ifdef CONFIG_TSEC4
+	case 4:
+		mask = PIXIS_VSPEED2_TSEC4SER;
+		switch_mask = PIXIS_VCFGEN1_TSEC4SER;
+		break;
+#endif
 	default:
-		mask = PIXIS_VSPEED2_TSEC1SER | PIXIS_VSPEED2_TSEC3SER;
-		switch_mask = PIXIS_VCFGEN1_TSEC1SER | PIXIS_VCFGEN1_TSEC3SER;
+		mask = PIXIS_VSPEED2_MASK;
+		switch_mask = PIXIS_VCFGEN1_MASK;
 		break;
 	}
include/configs/MPC8544DS.h +3 -0
index b650874..76e5fb4 100644
@@ -202,6 +202,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define PIXIS_VSPEED2_TSEC3SER	0x1
 #define PIXIS_VCFGEN1_TSEC1SER	0x20
 #define PIXIS_VCFGEN1_TSEC3SER	0x40
+#define PIXIS_VSPEED2_MASK	(PIXIS_VSPEED2_TSEC1SER|PIXIS_VSPEED2_TSEC3SER)
+#define PIXIS_VCFGEN1_MASK	(PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER)
 
 
 /* define to use L1 as initial stack */

@@ -374,6 +376,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_TSEC3	1
 #define CONFIG_TSEC3_NAME	"eTSEC3"
 
+#define CONFIG_PIXIS_SGMII_CMD
 #define CONFIG_FSL_SGMII_RISER	1
 #define SGMII_RISER_PHY_OFFSET	0x1c
Signature · 1 line
1.5.4
author
#1 lore raw

PATCH 2/4 Enabled the Freescale SGMII riser card on 8572DS

From: Liu Yu <[email protected]>

This patch based on Andy's work.
Including command 'pixis_set_sgmii' support.

Signed-off-by Liu Yu <[email protected]>
---
 board/freescale/mpc8572ds/mpc8572ds.c |   48 +++++++++++++++++++++++++++++++++
 include/configs/MPC8572DS.h           |   24 ++++++++++++++++
 2 files changed, 72 insertions(+), 0 deletions(-)
board/freescale/mpc8572ds/mpc8572ds.c +48 -0
index 70b548b..0520137 100644
@@ -32,8 +32,10 @@
 #include <miiphy.h>
 #include <libfdt.h>
 #include <fdt_support.h>
+#include <tsec.h>
 
 #include "../common/pixis.h"
+#include "../common/sgmii_riser.h"
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);

@@ -521,6 +523,52 @@ unsigned long get_board_ddr_clk(ulong dummy)
 }
 #endif
 
+#ifdef CONFIG_TSEC_ENET
+int board_eth_init(bd_t *bis)
+{
+	struct tsec_info_struct tsec_info[4];
+	volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
+	int num = 0;
+
+#ifdef CONFIG_TSEC1
+	SET_STD_TSEC_INFO(tsec_info[num], 1);
+	if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
+		tsec_info[num].flags |= TSEC_SGMII;
+	num++;
+#endif
+#ifdef CONFIG_TSEC2
+	SET_STD_TSEC_INFO(tsec_info[num], 2);
+	if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
+		tsec_info[num].flags |= TSEC_SGMII;
+	num++;
+#endif
+#ifdef CONFIG_TSEC3
+	SET_STD_TSEC_INFO(tsec_info[num], 3);
+	if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
+		tsec_info[num].flags |= TSEC_SGMII;
+	num++;
+#endif
+#ifdef CONFIG_TSEC4
+	SET_STD_TSEC_INFO(tsec_info[num], 4);
+	if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
+		tsec_info[num].flags |= TSEC_SGMII;
+	num++;
+#endif
+
+	if (!num) {
+		printf("No TSECs initialized\n");
+
+		return 0;
+	}
+
+	fsl_sgmii_riser_init(tsec_info, num);
+
+	tsec_eth_init(bis, tsec_info, num);
+
+	return 0;
+}
+#endif
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 void ft_board_setup(void *blob, bd_t *bd)
 {
include/configs/MPC8572DS.h +24 -0
index d7e3a88..febc755 100644
@@ -238,6 +238,22 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define PIXIS_VCLKH		0x19	/* VELA VCLKH register */
 #define PIXIS_VCLKL		0x1A	/* VELA VCLKL register */
 #define CFG_PIXIS_VBOOT_MASK	0xc0
+#define PIXIS_VSPEED2_TSEC1SER	0x8
+#define PIXIS_VSPEED2_TSEC2SER	0x4
+#define PIXIS_VSPEED2_TSEC3SER	0x2
+#define PIXIS_VSPEED2_TSEC4SER	0x1
+#define PIXIS_VCFGEN1_TSEC1SER	0x20
+#define PIXIS_VCFGEN1_TSEC2SER	0x20
+#define PIXIS_VCFGEN1_TSEC3SER	0x20
+#define PIXIS_VCFGEN1_TSEC4SER	0x20
+#define PIXIS_VSPEED2_MASK	(PIXIS_VSPEED2_TSEC1SER \
+					| PIXIS_VSPEED2_TSEC2SER \
+					| PIXIS_VSPEED2_TSEC3SER \
+					| PIXIS_VSPEED2_TSEC4SER)
+#define PIXIS_VCFGEN1_MASK	(PIXIS_VCFGEN1_TSEC1SER \
+					| PIXIS_VCFGEN1_TSEC2SER \
+					| PIXIS_VCFGEN1_TSEC3SER \
+					| PIXIS_VCFGEN1_TSEC4SER)
 
 /* define to use L1 as initial stack */
 #define CONFIG_L1_INIT_RAM

@@ -403,6 +419,14 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_TSEC4	1
 #define CONFIG_TSEC4_NAME	"eTSEC4"
 
+#define CONFIG_PIXIS_SGMII_CMD
+#define CONFIG_FSL_SGMII_RISER	1
+#define SGMII_RISER_PHY_OFFSET	0x1c
+
+#ifdef CONFIG_FSL_SGMII_RISER
+#define CFG_TBIPA_VALUE		0x10 /* avoid conflict with eTSEC4 paddr */
+#endif
+
 #define TSEC1_PHY_ADDR		0
 #define TSEC2_PHY_ADDR		1
 #define TSEC3_PHY_ADDR		2
Signature · 1 line
1.5.4
author
#2 lore raw

PATCH 3/4 Enabled the Freescale SGMII riser card on 8536DS

Signed-off-by Jason Jin <[email protected]>
---
 board/freescale/mpc8536ds/mpc8536ds.c |   43 +++++++++++++++++++++++++++++++++
 include/configs/MPC8536DS.h           |    3 ++
 2 files changed, 46 insertions(+), 0 deletions(-)
board/freescale/mpc8536ds/mpc8536ds.c +43 -0
index 8216c70..3401133 100644
@@ -34,8 +34,11 @@
 #include <libfdt.h>
 #include <spd_sdram.h>
 #include <fdt_support.h>
+#include <tsec.h>
+#include <netdev.h>
 
 #include "../common/pixis.h"
+#include "../common/sgmii_riser.h"
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);

@@ -608,6 +611,46 @@ get_board_ddr_clk(ulong dummy)
 }
 #endif
 
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_TSEC_ENET
+	struct tsec_info_struct tsec_info[2];
+	volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
+	int num = 0;
+	uint devdisr = gur->devdisr;
+	uint sdrs2_io_sel =
+		(gur->pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >> 27;
+
+#ifdef CONFIG_TSEC1
+	SET_STD_TSEC_INFO(tsec_info[num], 1);
+	if ((sdrs2_io_sel == 4) || (sdrs2_io_sel == 6)) {
+		tsec_info[num].phyaddr = 0;
+		tsec_info[num].flags |= TSEC_SGMII;
+	}
+	num++;
+#endif
+#ifdef CONFIG_TSEC3
+	SET_STD_TSEC_INFO(tsec_info[num], 3);
+	if (sdrs2_io_sel == 4) {
+		tsec_info[num].phyaddr = 1;
+		tsec_info[num].flags |= TSEC_SGMII;
+	}
+	num++;
+#endif
+
+	if (!num) {
+		printf("No TSECs initialized\n");
+		return 0;
+	}
+
+	if ((sdrs2_io_sel == 4) || (sdrs2_io_sel == 6))
+		fsl_sgmii_riser_init(tsec_info, num);
+
+	tsec_eth_init(bis, tsec_info, num);
+#endif
+	return pci_eth_init(bis);
+}
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 void
 ft_board_setup(void *blob, bd_t *bd)
include/configs/MPC8536DS.h +3 -0
index 2578bef..365818c 100644
@@ -428,6 +428,9 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_TSEC3	1
 #define CONFIG_TSEC3_NAME	"eTSEC3"
 
+#define CONFIG_FSL_SGMII_RISER	1
+#define SGMII_RISER_PHY_OFFSET	0x1c
+
 #define TSEC1_PHY_ADDR		1	/* TSEC1 -> PHY1 */
 #define TSEC3_PHY_ADDR		0	/* TSEC3 -> PHY0 */
Signature · 1 line
1.5.4
author
#3 lore raw

PATCH 4/4 Do not init SATA when disabled on 8536DS.

SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the driver still try to access the SATA registers, the cpu will hangup. This patch try to fix this by reading the serdes status before the SATA initialize.

Signed-off-by Jason Jin <[email protected]>
---
 board/freescale/mpc8536ds/mpc8536ds.c |   12 ++++++++++++
 lib_ppc/board.c                       |   16 ++++++++++++++--
 2 files changed, 26 insertions(+), 2 deletions(-)
board/freescale/mpc8536ds/mpc8536ds.c +12 -0
index 3401133..37d4b61 100644
@@ -651,6 +651,18 @@ int board_eth_init(bd_t *bis)
 	return pci_eth_init(bis);
 }
 
+int is_sata_supported()
+{
+	volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
+	uint devdisr = gur->devdisr;
+	uint sdrs2_io_sel =
+		(gur->pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >> 27;
+	if (sdrs2_io_sel & 0x04)
+		return 0;
+
+	return 1;
+}
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 void
 ft_board_setup(void *blob, bd_t *bd)
lib_ppc/board.c +14 -2
index c02ac62..564faf2 100644
@@ -635,6 +635,16 @@ void board_init_f (ulong bootflag)
 	/* NOTREACHED - relocate_code() does not return */
 }
 
+int __is_sata_supported()
+{
+	/* For some boards, when sata disabled by the switch, and the
+	 * driver still access the sata registers, the cpu will hangup.
+	 * please define platform specific is_sata_supported() if your
+	 * board have such issue.*/
+	return 1;
+}
+int is_sata_supported() __attribute__((weak, alias("__is_sata_supported")));
+
 /************************************************************************
  *
  * This is the next part if the initialization sequence: we are now

@@ -1105,8 +1115,10 @@ void board_init_r (gd_t *id, ulong dest_addr)
 #endif
 
 #if defined(CONFIG_CMD_SATA)
-	puts ("SATA:  ");
-	sata_initialize ();
+	if (is_sata_supported()) {
+		puts("SATA:  ");
+		sata_initialize();
+	}
 #endif
 
 #ifdef CONFIG_LAST_STAGE_INIT
Signature · 1 line
1.5.4
#4 lore raw

PATCH 4/4 Do not init SATA when disabled on 8536DS.

Quoted 7 lines · Jason Jin

SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup. This patch try to fix this by reading the serdes status before the SATA
initialize.

Quoted 5 lines
Signed-off-by Jason Jin <[email protected]>

---

board/freescale/mpc8536ds/mpc8536ds.c |   12 ++++++++++++
lib_ppc/board.c                       |   16 ++++++++++++++--
2 files changed, 26 insertions(+), 2 deletions(-)

Wolfgang, I think this was a patch for v2008.10.. Andy was looking for you to ack or apply.

- k

#5 lore raw

PATCH 4/4 Do not init SATA when disabled on 8536DS.

Quoted 11 lines · Kumar Gala
Quoted 8 lines · Jason Jin

SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup. This patch try to fix this by reading the serdes status before the SATA
initialize.

Signed-off-by Jason Jin <[email protected]>
Acked-by Andy Fleming <[email protected]>

Wolfgang, if you want, I can apply this to my master branch, and push it out for 2008-10. Whichever is more convenient for you.

Andy

#6 lore raw

PATCH 4/4 Do not init SATA when disabled on 8536DS.

Dear Andy,

Quoted 11 lines · In message <[email protected]> you…
Quoted 10 lines · Kumar Gala
Quoted 7 lines · Jason Jin

SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup. This patch try to fix this by reading the serdes status before the SATA
initialize.

Quoted 6 lines
Quoted 1 line
Quoted 1 line
Signed-off-by Jason Jin <[email protected]>
Acked-by Andy Fleming <[email protected]>

Wolfgang, if you want, I can apply this to my master branch, and push it out for 2008-10. Whichever is more convenient for you.

I apply it directly, thanks.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
When the bosses talk about improving  productivity,  they  are  never
talking about themselves.
#7 lore raw

PATCH 4/4 Do not init SATA when disabled on 8536DS.

In reply to Kumar Gala

Dear Kumar Gala,

Quoted 10 lines · In message <[email protected]> you wrote:
Quoted 7 lines · Jason Jin

SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup. This patch try to fix this by reading the serdes status before the SATA
initialize.

Quoted 8 lines
Quoted 5 lines
Signed-off-by Jason Jin <[email protected]>

---

board/freescale/mpc8536ds/mpc8536ds.c |   12 ++++++++++++
lib_ppc/board.c                       |   16 ++++++++++++++--
2 files changed, 26 insertions(+), 2 deletions(-)

Wolfgang, I think this was a patch for v2008.10.. Andy was looking for you to ack or apply.

It was on my to-do list. Thanks for the reminder.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"It is better to have tried and failed than to have  failed  to  try,
but the result's the same."                           - Mike Dennison
Applied
#8 lore raw

PATCH 4/4 Do not init SATA when disabled on 8536DS.

In reply to Jason Jin

Dear Jason Jin,

Quoted 10 lines · In message <[email protected]> you wrote:

SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the driver still try to access the SATA registers, the cpu will hangup. This patch try to fix this by reading the serdes status before the SATA initialize.

Signed-off-by Jason Jin <[email protected]>
---
 board/freescale/mpc8536ds/mpc8536ds.c |   12 ++++++++++++
 lib_ppc/board.c                       |   16 ++++++++++++++--
 2 files changed, 26 insertions(+), 2 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

Signature · 4 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Calm down, it's *__only* ones and zeroes.
Applied
#11 lore raw

PATCH 1/4 Make pixis_set_sgmii more general to support MPC85xx boards.

In reply to Jason Jin
Quoted 11 lines · Jason Jin

From: Liu Yu <[email protected]>

The pixis sgmii command depend on the FPGA support on the board, some 85xx boards support SGMII riser card but did not support this command, define CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.

Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and PIXIS_VCFGEN1_MASK in header file for both boards.

Signed-off-by Liu Yu <[email protected]>

Applied to 85xx-next