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sbc8548 PHY fix, cmdline editing.

PATCH New Paul Gortmaker 1 participant 4 messages Dec 11, 2008

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#0 lore raw

cover sbc8548 PHY fix, cmdline editing.

Hi Andy,

Would you please merge these three sbc8548 patches via the mpc85xx tree?

This fixes an incorrect PHY address issue that was masked by the tsec
driver inadvertently doing an "if (0) {...}" Rather than put in bogus
PHY address for the eTSEC3 and eTSEC4, I just purged them from the board config file altogether.

I also got sick of not having command line editing, and so enabled that.

Thanks,
Paul.

#1 lore raw

PATCH 1/3 sbc8548: don't enable the 3rd and 4th eTSEC

These interfaces don't have usable connectors on the board, so don't bother enumerating or configuring them.

---
 include/configs/sbc8548.h |   15 +--------------
 1 files changed, 1 insertions(+), 14 deletions(-)
include/configs/sbc8548.h +1 -14
index 5ce4dac..49fd6e5 100644
@@ -400,25 +400,16 @@
 #define CONFIG_TSEC1_NAME	"eTSEC0"
 #define CONFIG_TSEC2	1
 #define CONFIG_TSEC2_NAME	"eTSEC1"
-#define CONFIG_TSEC3	1
-#define CONFIG_TSEC3_NAME	"eTSEC2"
-#define CONFIG_TSEC4
-#define CONFIG_TSEC4_NAME	"eTSEC3"
 #undef CONFIG_MPC85XX_FEC
 
 #define TSEC1_PHY_ADDR		0
 #define TSEC2_PHY_ADDR		1
-#define TSEC3_PHY_ADDR		2
-#define TSEC4_PHY_ADDR		3
 
 #define TSEC1_PHYIDX		0
 #define TSEC2_PHYIDX		0
-#define TSEC3_PHYIDX		0
-#define TSEC4_PHYIDX		0
+
 #define TSEC1_FLAGS		TSEC_GIGABIT
 #define TSEC2_FLAGS		TSEC_GIGABIT
-#define TSEC3_FLAGS		(TSEC_GIGABIT | TSEC_REDUCED)
-#define TSEC4_FLAGS		(TSEC_GIGABIT | TSEC_REDUCED)
 
 /* Options are: eTSEC[0-3] */
 #define CONFIG_ETHPRIME		"eTSEC0"
@@ -508,10 +499,6 @@
 #define CONFIG_ETHADDR	 02:E0:0C:00:00:FD
 #define CONFIG_HAS_ETH1
 #define CONFIG_ETH1ADDR	 02:E0:0C:00:01:FD
-#define CONFIG_HAS_ETH2
-#define CONFIG_ETH2ADDR	 02:E0:0C:00:02:FD
-#define CONFIG_HAS_ETH3
-#define CONFIG_ETH3ADDR	 02:E0:0C:00:03:FD
 #endif
 
 #define CONFIG_IPADDR	 192.168.0.55
Signature · 1 line
1.6.0.4
#2 lore raw

PATCH 2/3 sbc8548: use proper PHY address

The values given for the PHY address were wrong, so the code read no valid PHY ID, and fell through to the generic PHY support, which would work on 1000M but would not auto negotiate down to 100M or 10M.

---
 include/configs/sbc8548.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
include/configs/sbc8548.h +2 -2
index 49fd6e5..b27b282 100644
@@ -402,8 +402,8 @@
 #define CONFIG_TSEC2_NAME	"eTSEC1"
 #undef CONFIG_MPC85XX_FEC
 
-#define TSEC1_PHY_ADDR		0
-#define TSEC2_PHY_ADDR		1
+#define TSEC1_PHY_ADDR		0x19
+#define TSEC2_PHY_ADDR		0x1a
 
 #define TSEC1_PHYIDX		0
 #define TSEC2_PHYIDX		0
Signature · 1 line
1.6.0.4
#3 lore raw

PATCH 3/3 sbc8548: enable command line editing by default.

Lets make things a bit more user friendly. It isn't 1985 anymore.

---
 include/configs/sbc8548.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
include/configs/sbc8548.h +1 -0
index b27b282..e93b861 100644
@@ -456,6 +456,7 @@
 /*
  * Miscellaneous configurable options
  */
+#define CONFIG_CMDLINE_EDITING			/* undef to save memory */
 #define CONFIG_SYS_LONGHELP			/* undef to save memory	*/
 #define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
 #define CONFIG_SYS_PROMPT	"=> "		/* Monitor Command Prompt */
Signature · 1 line
1.6.0.4