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KVM: MMU: Map device MMIO as UC in EPT

PATCH Applied Sheng Yang 2 participants 2 messages Jan 21, 2009

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Sheng Yang

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#0 lore raw

PATCH 1/1 KVM: MMU: Map device MMIO as UC in EPT

Software are not allow to access device MMIO using cacheable memory type, the patch limit MMIO region with UC and WC(guest can select WC using PAT and PCD/PWT).

---
 arch/x86/kvm/mmu.c |    9 +++++++--
 arch/x86/kvm/vmx.c |    3 +--
 2 files changed, 8 insertions(+), 4 deletions(-)
arch/x86/kvm/mmu.c +7 -2
index 0798610..ef060ec 100644
@@ -1712,8 +1712,13 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
 	if (largepage)
 		spte |= PT_PAGE_SIZE_MASK;
 	if (mt_mask) {
-		mt_mask = get_memory_type(vcpu, gfn) <<
-			  kvm_x86_ops->get_mt_mask_shift();
+		if (!kvm_is_mmio_pfn(pfn)) {
+			mt_mask = get_memory_type(vcpu, gfn) <<
+				kvm_x86_ops->get_mt_mask_shift();
+			mt_mask |= VMX_EPT_IGMT_BIT;
+		} else
+			mt_mask = MTRR_TYPE_UNCACHABLE <<
+				kvm_x86_ops->get_mt_mask_shift();
 		spte |= mt_mask;
 	}
 
arch/x86/kvm/vmx.c +1 -2
index 9b56d21..73e8fd9 100644
@@ -3782,8 +3782,7 @@ static int __init vmx_init(void)
 	if (vm_need_ept()) {
 		bypass_guest_pf = 0;
 		kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK |
-			VMX_EPT_WRITABLE_MASK |
-			VMX_EPT_IGMT_BIT);
+			VMX_EPT_WRITABLE_MASK);
 		kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull,
 				VMX_EPT_EXECUTABLE_MASK,
 				VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT);
Signature · 1 line
1.5.4.5
Applied
#1 lore raw
Quoted 4 lines · Sheng Yang

Software are not allow to access device MMIO using cacheable memory type, the patch limit MMIO region with UC and WC(guest can select WC using PAT and PCD/PWT).

Applied, thanks.

Signature · 1 line
error compiling committee.c: too many arguments to function