watchdog:OMAP3:Add support for IVA2, SECURE WDTs

This patch adds support for IVA2 and SECURE WDTs in the omap_wdt driver for omap34xx family. SECURE will be available as /dev/watchdog_secure on HS/EMU devices and IVA2 will be available as /dev/watchdog_iva2. MPU will still be available as /dev/watchdog

Tested on Zoom1 OMAP3 platform

Signed-off-by Ulrik Bech Hald <[email protected]>

---
runtime: [PATCH 1/1] watchdog: OMAP fixes: enable clock in probe, trigger timer reload

 drivers/watchdog/omap_wdt.c |   34 ++++++++++++++++++++++++++--------
 1 files changed, 26 insertions(+), 8 deletions(-)

drivers/watchdog/omap_wdt.c +26 -8

index f271385..ab9bd88
@@ -47,7 +47,9 @@
 
 #include "omap_wdt.h"
 
-static struct platform_device *omap_wdt_dev;
+#define NUM_WDTS	3
+
+static struct platform_device *omap_wdt_dev[NUM_WDTS];
 
 static unsigned timer_margin;
 module_param(timer_margin, uint, 0);

@@ -139,8 +141,23 @@ static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
  */
 static int omap_wdt_open(struct inode *inode, struct file *file)
 {
-	struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
-	void __iomem *base = wdev->base;
+	struct omap_wdt_dev *wdev = NULL;
+	void __iomem *base;
+
+	/* Find match between device node and wdt device */
+	int i;
+	for (i = 0; i < NUM_WDTS; i++) {
+		if (omap_wdt_dev[i]) {
+			wdev = platform_get_drvdata(omap_wdt_dev[i]);
+			if (iminor(inode) == wdev->omap_wdt_miscdev.minor)
+				break;
+		}
+	}
+
+	if (!wdev)
+		return -ENODEV;
+
+	base = wdev->base;
 
 	if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
 		return -EBUSY;

@@ -271,7 +288,7 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
 		goto err_get_resource;
 	}
 
-	if (omap_wdt_dev) {
+	if (omap_wdt_dev[pdev->id-1]) {
 		ret = -EBUSY;
 		goto err_busy;
 	}

@@ -317,9 +334,9 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
 	omap_wdt_adjust_timeout(timer_margin);
 
 	wdev->omap_wdt_miscdev.parent = &pdev->dev;
-	wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
-	wdev->omap_wdt_miscdev.name = "watchdog";
+	wdev->omap_wdt_miscdev.minor = MISC_DYNAMIC_MINOR;
 	wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
+	wdev->omap_wdt_miscdev.name = (char *) pdev->dev.platform_data;
 
 	ret = misc_register(&(wdev->omap_wdt_miscdev));
 	if (ret)

@@ -332,7 +349,8 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
 	/* autogate OCP interface clock */
 	__raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
 
-	omap_wdt_dev = pdev;
+	/* keep track of the wdt platform devices in local device array */
+	omap_wdt_dev[pdev->id - 1] = pdev;
 
 	return 0;
 

@@ -384,7 +402,7 @@ static int __devexit omap_wdt_remove(struct platform_device *pdev)
 	iounmap(wdev->base);
 
 	kfree(wdev);
-	omap_wdt_dev = NULL;
+	omap_wdt_dev[pdev->id-1] = NULL;
 
 	return 0;
 }

Signature · 6 lines

1.5.4.3

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Enabling registration of IVA and SECURE WDT devices. Making ick and fck for IVA and SECURE WDTs accessible.

Tested on Zoom1 OMAP3 platform

Signed-off-by Ulrik Bech Hald <[email protected]>

---
 arch/arm/mach-omap1/clock.c     |    6 +-
 arch/arm/mach-omap2/clock24xx.c |    4 +-
 arch/arm/mach-omap2/clock34xx.c |   12 +++---
 arch/arm/plat-omap/devices.c    |   91 ++++++++++++++++++++++++++++++++-------
 4 files changed, 86 insertions(+), 27 deletions(-)

arch/arm/mach-omap1/clock.c +3 -3

index 436eed2..c0b5849 100644
@@ -85,9 +85,9 @@ static struct omap_clk omap_clks[] = {
 	CLK(NULL,	"arm_gpio_ck",	&arm_gpio_ck,	CK_1510 | CK_310),
 	CLK(NULL,	"armxor_ck",	&armxor_ck.clk,	CK_16XX | CK_1510 | CK_310),
 	CLK(NULL,	"armtim_ck",	&armtim_ck.clk,	CK_16XX | CK_1510 | CK_310),
-	CLK("omap_wdt",	"fck",		&armwdt_ck.clk,	CK_16XX | CK_1510 | CK_310),
-	CLK("omap_wdt",	"ick",		&armper_ck.clk,	CK_16XX),
-	CLK("omap_wdt", "ick",		&dummy_ck,	CK_1510 | CK_310),
+	CLK("omap_wdt.2", "fck",	&armwdt_ck.clk,	CK_16XX | CK_1510 | CK_310),
+	CLK("omap_wdt.2", "ick",	&armper_ck.clk,	CK_16XX),
+	CLK("omap_wdt.2", "ick",	&dummy_ck,	CK_1510 | CK_310),
 	CLK(NULL,	"arminth_ck",	&arminth_ck1510, CK_1510 | CK_310),
 	CLK(NULL,	"arminth_ck",	&arminth_ck16xx, CK_16XX),
 	/* CK_GEN2 clocks */

arch/arm/mach-omap2/clock24xx.c +2 -2

index 44de027..4fe3def
@@ -165,8 +165,8 @@ static struct omap_clk omap24xx_clks[] = {
 	CLK(NULL,	"uart3_fck",	&uart3_fck,	CK_243X | CK_242X),
 	CLK(NULL,	"gpios_ick",	&gpios_ick,	CK_243X | CK_242X),
 	CLK(NULL,	"gpios_fck",	&gpios_fck,	CK_243X | CK_242X),
-	CLK("omap_wdt",	"ick",		&mpu_wdt_ick,	CK_243X | CK_242X),
-	CLK("omap_wdt",	"fck",		&mpu_wdt_fck,	CK_243X | CK_242X),
+	CLK("omap_wdt.2", "ick",	&mpu_wdt_ick,	CK_243X | CK_242X),
+	CLK("omap_wdt.2", "fck",	&mpu_wdt_fck,	CK_243X | CK_242X),
 	CLK(NULL,	"sync_32k_ick",	&sync_32k_ick,	CK_243X | CK_242X),
 	CLK(NULL,	"wdt1_ick",	&wdt1_ick,	CK_243X | CK_242X),
 	CLK(NULL,	"omapctrl_ick",	&omapctrl_ick,	CK_243X | CK_242X),

arch/arm/mach-omap2/clock34xx.c +6 -6

index 045da92..a4613e5 100644
@@ -215,11 +215,11 @@ static struct omap_clk omap34xx_clks[] = {
 	CLK(NULL,	"gpt1_fck",	&gpt1_fck,	CK_343X),
 	CLK(NULL,	"wkup_32k_fck",	&wkup_32k_fck,	CK_343X),
 	CLK(NULL,	"gpio1_dbck",	&gpio1_dbck,	CK_343X),
-	CLK("omap_wdt",	"fck",		&wdt2_fck,	CK_343X),
+	CLK("omap_wdt.2", "fck",	&wdt2_fck,	CK_343X),
 	CLK(NULL,	"wkup_l4_ick",	&wkup_l4_ick,	CK_343X),
 	CLK(NULL,	"usim_ick",	&usim_ick,	CK_3430ES2),
-	CLK("omap_wdt",	"ick",		&wdt2_ick,	CK_343X),
-	CLK(NULL,	"wdt1_ick",	&wdt1_ick,	CK_343X),
+	CLK("omap_wdt.2", "ick",	&wdt2_ick,	CK_343X),
+	CLK("omap_wdt.1", "ick",	&wdt1_ick,	CK_343X),
 	CLK(NULL,	"gpio1_ick",	&gpio1_ick,	CK_343X),
 	CLK(NULL,	"omap_32ksync_ick", &omap_32ksync_ick, CK_343X),
 	CLK(NULL,	"gpt12_ick",	&gpt12_ick,	CK_343X),

@@ -241,14 +241,14 @@ static struct omap_clk omap34xx_clks[] = {
 	CLK(NULL,	"gpio4_dbck",	&gpio4_dbck,	CK_343X),
 	CLK(NULL,	"gpio3_dbck",	&gpio3_dbck,	CK_343X),
 	CLK(NULL,	"gpio2_dbck",	&gpio2_dbck,	CK_343X),
-	CLK(NULL,	"wdt3_fck",	&wdt3_fck,	CK_343X),
+	CLK("omap_wdt.3", "fck",	&wdt3_fck,	CK_343X),
 	CLK(NULL,	"per_l4_ick",	&per_l4_ick,	CK_343X),
 	CLK(NULL,	"gpio6_ick",	&gpio6_ick,	CK_343X),
 	CLK(NULL,	"gpio5_ick",	&gpio5_ick,	CK_343X),
 	CLK(NULL,	"gpio4_ick",	&gpio4_ick,	CK_343X),
 	CLK(NULL,	"gpio3_ick",	&gpio3_ick,	CK_343X),
 	CLK(NULL,	"gpio2_ick",	&gpio2_ick,	CK_343X),
-	CLK(NULL,	"wdt3_ick",	&wdt3_ick,	CK_343X),
+	CLK("omap_wdt.3", "ick",	&wdt3_ick,	CK_343X),
 	CLK(NULL,	"uart3_ick",	&uart3_ick,	CK_343X),
 	CLK(NULL,	"gpt9_ick",	&gpt9_ick,	CK_343X),
 	CLK(NULL,	"gpt8_ick",	&gpt8_ick,	CK_343X),

@@ -275,7 +275,7 @@ static struct omap_clk omap34xx_clks[] = {
 	CLK(NULL,	"sr_l4_ick",	&sr_l4_ick,	CK_343X),
 	CLK(NULL,	"secure_32k_fck", &secure_32k_fck, CK_343X),
 	CLK(NULL,	"gpt12_fck",	&gpt12_fck,	CK_343X),
-	CLK(NULL,	"wdt1_fck",	&wdt1_fck,	CK_343X),
+	CLK("omap_wdt.1", "fck",	&wdt1_fck,	CK_343X),
 };
 
 /* CM_AUTOIDLE_PLL*.AUTO_* bit values */

arch/arm/plat-omap/devices.c +52 -9

index a64b692..5614f97
@@ -288,42 +288,101 @@ static inline void omap_init_uwire(void) {}
 
 #if	defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
 
-static struct resource wdt_resources[] = {
+#define	OMAP44XX_WDT2_BASE	0x4a314000
+#define	OMAP34XX_WDT1_BASE	0x4830c000
+#define	OMAP34XX_WDT2_BASE	0x48314000
+#define	OMAP34XX_WDT3_BASE	0x49030000
+#define	OMAP2430_WDT_BASE	0x49016000
+#define	OMAP2420_WDT_BASE	0x48022000
+#define	OMAP16XX_WDT_BASE	0xfffeb000
+
+static struct resource secure_wdt_resources[] = {
 	{
-		.flags		= IORESOURCE_MEM,
+		.flags = IORESOURCE_MEM,
 	},
 };
 
-static struct platform_device omap_wdt_device = {
-	.name	   = "omap_wdt",
-	.id	     = -1,
-	.num_resources	= ARRAY_SIZE(wdt_resources),
-	.resource	= wdt_resources,
+static struct resource mpu_wdt_resources[] = {
+	{
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+static struct resource iva2_wdt_resources[] = {
+	{
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device omap_secure_wdt_device = {
+	.name = "omap_wdt",
+	.id = 1,
+	.num_resources = ARRAY_SIZE(secure_wdt_resources),
+	.resource = secure_wdt_resources,
+	.dev = {
+		.platform_data = "watchdog_secure",
+	},
+};
+
+static struct platform_device omap_mpu_wdt_device = {
+	.name = "omap_wdt",
+	.id = 2,
+	.num_resources = ARRAY_SIZE(mpu_wdt_resources),
+	.resource = mpu_wdt_resources,
+	.dev = {
+		.platform_data = "watchdog",
+	},
+};
+
+static struct platform_device omap_iva2_wdt_device = {
+	.name = "omap_wdt",
+	.id = 3,
+	.num_resources = ARRAY_SIZE(iva2_wdt_resources),
+	.resource = iva2_wdt_resources,
+	.dev = {
+		.platform_data = "watchdog_iva2",
+	},
 };
 
 static void omap_init_wdt(void)
 {
 	if (cpu_is_omap16xx())
-		wdt_resources[0].start = 0xfffeb000;
+		mpu_wdt_resources[0].start = OMAP16XX_WDT_BASE;
 	else if (cpu_is_omap2420())
-		wdt_resources[0].start = 0x48022000; /* WDT2 */
+		mpu_wdt_resources[0].start = OMAP2420_WDT_BASE;
 	else if (cpu_is_omap2430())

arch/arm/plat-omap/devices.c +8 -1

+		mpu_wdt_resources[0].start = OMAP34XX_WDT2_BASE;
+		iva2_wdt_resources[0].start = OMAP34XX_WDT3_BASE;
+		iva2_wdt_resources[0].end = iva2_wdt_resources[0].start + 0x4f;
+	} else if (cpu_is_omap44xx())
+		mpu_wdt_resources[0].start = OMAP44XX_WDT2_BASE;
 	else
 		return;
 
-	wdt_resources[0].end = wdt_resources[0].start + 0x4f;
+	mpu_wdt_resources[0].end = mpu_wdt_resources[0].start + 0x4f;
+
+	/* MPU WDT present across omap family */

arch/arm/plat-omap/devices.c +2 -0

 }
+
 #else
 static inline void omap_init_wdt(void) {}
 #endif
 
+
 /*-------------------------------------------------------------------------*/
 
 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)

Signature · 6 lines

1.5.4.3

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Enabling registration of IVA and SECURE WDT devices. Making ick and fck for IVA and SECURE WDTs accessible.

Tested on Zoom1 OMAP3 platform

Signed-off-by Ulrik Bech Hald <[email protected]>

---
 arch/arm/mach-omap1/clock.c     |    6 +-
 arch/arm/mach-omap2/clock24xx.c |    4 +-
 arch/arm/mach-omap2/clock34xx.c |   12 +++---
 arch/arm/plat-omap/devices.c    |   91 ++++++++++++++++++++++++++++++++-------
 4 files changed, 86 insertions(+), 27 deletions(-)

arch/arm/mach-omap1/clock.c +3 -3

index 436eed2..c0b5849 100644
@@ -85,9 +85,9 @@ static struct omap_clk omap_clks[] = {
 	CLK(NULL,	"arm_gpio_ck",	&arm_gpio_ck,	CK_1510 | CK_310),
 	CLK(NULL,	"armxor_ck",	&armxor_ck.clk,	CK_16XX | CK_1510 | CK_310),
 	CLK(NULL,	"armtim_ck",	&armtim_ck.clk,	CK_16XX | CK_1510 | CK_310),
-	CLK("omap_wdt",	"fck",		&armwdt_ck.clk,	CK_16XX | CK_1510 | CK_310),
-	CLK("omap_wdt",	"ick",		&armper_ck.clk,	CK_16XX),
-	CLK("omap_wdt", "ick",		&dummy_ck,	CK_1510 | CK_310),
+	CLK("omap_wdt.2", "fck",	&armwdt_ck.clk,	CK_16XX | CK_1510 | CK_310),
+	CLK("omap_wdt.2", "ick",	&armper_ck.clk,	CK_16XX),
+	CLK("omap_wdt.2", "ick",	&dummy_ck,	CK_1510 | CK_310),
 	CLK(NULL,	"arminth_ck",	&arminth_ck1510, CK_1510 | CK_310),
 	CLK(NULL,	"arminth_ck",	&arminth_ck16xx, CK_16XX),
 	/* CK_GEN2 clocks */

arch/arm/mach-omap2/clock24xx.c +2 -2

index 44de027..4fe3def
@@ -165,8 +165,8 @@ static struct omap_clk omap24xx_clks[] = {
 	CLK(NULL,	"uart3_fck",	&uart3_fck,	CK_243X | CK_242X),
 	CLK(NULL,	"gpios_ick",	&gpios_ick,	CK_243X | CK_242X),
 	CLK(NULL,	"gpios_fck",	&gpios_fck,	CK_243X | CK_242X),
-	CLK("omap_wdt",	"ick",		&mpu_wdt_ick,	CK_243X | CK_242X),
-	CLK("omap_wdt",	"fck",		&mpu_wdt_fck,	CK_243X | CK_242X),
+	CLK("omap_wdt.2", "ick",	&mpu_wdt_ick,	CK_243X | CK_242X),
+	CLK("omap_wdt.2", "fck",	&mpu_wdt_fck,	CK_243X | CK_242X),
 	CLK(NULL,	"sync_32k_ick",	&sync_32k_ick,	CK_243X | CK_242X),
 	CLK(NULL,	"wdt1_ick",	&wdt1_ick,	CK_243X | CK_242X),
 	CLK(NULL,	"omapctrl_ick",	&omapctrl_ick,	CK_243X | CK_242X),

arch/arm/mach-omap2/clock34xx.c +6 -6

index 045da92..a4613e5 100644
@@ -215,11 +215,11 @@ static struct omap_clk omap34xx_clks[] = {
 	CLK(NULL,	"gpt1_fck",	&gpt1_fck,	CK_343X),
 	CLK(NULL,	"wkup_32k_fck",	&wkup_32k_fck,	CK_343X),
 	CLK(NULL,	"gpio1_dbck",	&gpio1_dbck,	CK_343X),
-	CLK("omap_wdt",	"fck",		&wdt2_fck,	CK_343X),
+	CLK("omap_wdt.2", "fck",	&wdt2_fck,	CK_343X),
 	CLK(NULL,	"wkup_l4_ick",	&wkup_l4_ick,	CK_343X),
 	CLK(NULL,	"usim_ick",	&usim_ick,	CK_3430ES2),
-	CLK("omap_wdt",	"ick",		&wdt2_ick,	CK_343X),
-	CLK(NULL,	"wdt1_ick",	&wdt1_ick,	CK_343X),
+	CLK("omap_wdt.2", "ick",	&wdt2_ick,	CK_343X),
+	CLK("omap_wdt.1", "ick",	&wdt1_ick,	CK_343X),
 	CLK(NULL,	"gpio1_ick",	&gpio1_ick,	CK_343X),
 	CLK(NULL,	"omap_32ksync_ick", &omap_32ksync_ick, CK_343X),
 	CLK(NULL,	"gpt12_ick",	&gpt12_ick,	CK_343X),

@@ -241,14 +241,14 @@ static struct omap_clk omap34xx_clks[] = {
 	CLK(NULL,	"gpio4_dbck",	&gpio4_dbck,	CK_343X),
 	CLK(NULL,	"gpio3_dbck",	&gpio3_dbck,	CK_343X),
 	CLK(NULL,	"gpio2_dbck",	&gpio2_dbck,	CK_343X),
-	CLK(NULL,	"wdt3_fck",	&wdt3_fck,	CK_343X),
+	CLK("omap_wdt.3", "fck",	&wdt3_fck,	CK_343X),
 	CLK(NULL,	"per_l4_ick",	&per_l4_ick,	CK_343X),
 	CLK(NULL,	"gpio6_ick",	&gpio6_ick,	CK_343X),
 	CLK(NULL,	"gpio5_ick",	&gpio5_ick,	CK_343X),
 	CLK(NULL,	"gpio4_ick",	&gpio4_ick,	CK_343X),
 	CLK(NULL,	"gpio3_ick",	&gpio3_ick,	CK_343X),
 	CLK(NULL,	"gpio2_ick",	&gpio2_ick,	CK_343X),
-	CLK(NULL,	"wdt3_ick",	&wdt3_ick,	CK_343X),
+	CLK("omap_wdt.3", "ick",	&wdt3_ick,	CK_343X),
 	CLK(NULL,	"uart3_ick",	&uart3_ick,	CK_343X),
 	CLK(NULL,	"gpt9_ick",	&gpt9_ick,	CK_343X),
 	CLK(NULL,	"gpt8_ick",	&gpt8_ick,	CK_343X),

@@ -275,7 +275,7 @@ static struct omap_clk omap34xx_clks[] = {
 	CLK(NULL,	"sr_l4_ick",	&sr_l4_ick,	CK_343X),
 	CLK(NULL,	"secure_32k_fck", &secure_32k_fck, CK_343X),
 	CLK(NULL,	"gpt12_fck",	&gpt12_fck,	CK_343X),
-	CLK(NULL,	"wdt1_fck",	&wdt1_fck,	CK_343X),
+	CLK("omap_wdt.1", "fck",	&wdt1_fck,	CK_343X),
 };
 
 /* CM_AUTOIDLE_PLL*.AUTO_* bit values */

arch/arm/plat-omap/devices.c +75 -16

index a64b692..5614f97
@@ -288,42 +288,101 @@ static inline void omap_init_uwire(void) {}
 
 #if	defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
 
-static struct resource wdt_resources[] = {
+#define	OMAP44XX_WDT2_BASE	0x4a314000
+#define	OMAP34XX_WDT1_BASE	0x4830c000
+#define	OMAP34XX_WDT2_BASE	0x48314000
+#define	OMAP34XX_WDT3_BASE	0x49030000
+#define	OMAP2430_WDT_BASE	0x49016000
+#define	OMAP2420_WDT_BASE	0x48022000
+#define	OMAP16XX_WDT_BASE	0xfffeb000
+
+static struct resource secure_wdt_resources[] = {
 	{
-		.flags		= IORESOURCE_MEM,
+		.flags = IORESOURCE_MEM,
 	},
 };
 
-static struct platform_device omap_wdt_device = {
-	.name	   = "omap_wdt",
-	.id	     = -1,
-	.num_resources	= ARRAY_SIZE(wdt_resources),
-	.resource	= wdt_resources,
+static struct resource mpu_wdt_resources[] = {
+	{
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+static struct resource iva2_wdt_resources[] = {
+	{
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device omap_secure_wdt_device = {
+	.name = "omap_wdt",
+	.id = 1,
+	.num_resources = ARRAY_SIZE(secure_wdt_resources),
+	.resource = secure_wdt_resources,
+	.dev = {
+		.platform_data = "watchdog_secure",
+	},
+};
+
+static struct platform_device omap_mpu_wdt_device = {
+	.name = "omap_wdt",
+	.id = 2,
+	.num_resources = ARRAY_SIZE(mpu_wdt_resources),
+	.resource = mpu_wdt_resources,
+	.dev = {
+		.platform_data = "watchdog",
+	},
+};
+
+static struct platform_device omap_iva2_wdt_device = {
+	.name = "omap_wdt",
+	.id = 3,
+	.num_resources = ARRAY_SIZE(iva2_wdt_resources),
+	.resource = iva2_wdt_resources,
+	.dev = {
+		.platform_data = "watchdog_iva2",
+	},
 };
 
 static void omap_init_wdt(void)
 {
 	if (cpu_is_omap16xx())
-		wdt_resources[0].start = 0xfffeb000;
+		mpu_wdt_resources[0].start = OMAP16XX_WDT_BASE;
 	else if (cpu_is_omap2420())
-		wdt_resources[0].start = 0x48022000; /* WDT2 */
+		mpu_wdt_resources[0].start = OMAP2420_WDT_BASE;
 	else if (cpu_is_omap2430())
-		wdt_resources[0].start = 0x49016000; /* WDT2 */
-	else if (cpu_is_omap343x())
-		wdt_resources[0].start = 0x48314000; /* WDT2 */
-	else if (cpu_is_omap44xx())
-		wdt_resources[0].start = 0x4a314000;
+		mpu_wdt_resources[0].start = OMAP2430_WDT_BASE;
+	else if (cpu_is_omap343x()) {
+		secure_wdt_resources[0].start = OMAP34XX_WDT1_BASE;
+		secure_wdt_resources[0].end = secure_wdt_resources[0].start \
+			+ 0x4f;
+		mpu_wdt_resources[0].start = OMAP34XX_WDT2_BASE;
+		iva2_wdt_resources[0].start = OMAP34XX_WDT3_BASE;
+		iva2_wdt_resources[0].end = iva2_wdt_resources[0].start + 0x4f;
+	} else if (cpu_is_omap44xx())
+		mpu_wdt_resources[0].start = OMAP44XX_WDT2_BASE;
 	else
 		return;
 
-	wdt_resources[0].end = wdt_resources[0].start + 0x4f;
+	mpu_wdt_resources[0].end = mpu_wdt_resources[0].start + 0x4f;
+
+	/* MPU WDT present across omap family */
+	(void) platform_device_register(&omap_mpu_wdt_device);
 
-	(void) platform_device_register(&omap_wdt_device);
+	if (cpu_is_omap34xx()) {
+		(void) platform_device_register(&omap_iva2_wdt_device);
+		if (omap_type() == OMAP2_DEVICE_TYPE_SEC
+			|| omap_type() == OMAP2_DEVICE_TYPE_EMU)
+			(void) \
+			platform_device_register(&omap_secure_wdt_device);
+	}
 }
+
 #else
 static inline void omap_init_wdt(void) {}
 #endif
 
+
 /*-------------------------------------------------------------------------*/
 
 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)

Signature · 6 lines

1.5.4.3

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This patch series enables support for IVA2 and SECURE WDTs, available on omap34xx.
The WDTs will be accessible (when present on device) through:
MPU: /dev/watchdog
SECURE: /dev/watchdog_secure
IVA2: /dev/watchdog_iva2

Tested on Zoom1 OMAP3 platform

Signed-off-by Ulrik Bech Hald <[email protected]>

---
This patch set has a dependency on:
runtime: [PATCH 1/1] watchdog: OMAP fixes: enable clock in probe, trigger timer reload

 arch/arm/mach-omap1/clock.c     |    6 +-
 arch/arm/mach-omap2/clock24xx.c |    4 -
 arch/arm/mach-omap2/clock34xx.c |   12 ++---
 arch/arm/plat-omap/devices.c    |   91 ++++++++++++++++++++++++++++++++--------
 drivers/watchdog/omap_wdt.c     |   34 +++++++++++---
 5 files changed, 112 insertions(+), 35 deletions(-)

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