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Fixed processing of bootarg 'mpurate'

PATCH In review Sanjeev Premi 2 participants 3 messages Aug 10, 2009

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Arm (32-bit) Arm sub-architectures OMAP2+ support OMAP clock framework support
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Sanjeev Premi

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#0 lore raw

PATCH 1/1 Fixed processing of bootarg 'mpurate'

The argument 'mpurate' had no effect on the MPU
frequency. This patch fixes the same.

Signed-off-by Sanjeev Premi <[email protected]>
---
 arch/arm/mach-omap2/clock34xx.c |   14 ++++++++++----
 1 files changed, 10 insertions(+), 4 deletions(-)
arch/arm/mach-omap2/clock34xx.c +10 -4
index 045da92..0c62aad 100644
@@ -27,6 +27,7 @@
 #include <linux/limits.h>
 #include <linux/bitops.h>
 
+#include <mach/cpu.h>
 #include <mach/clock.h>
 #include <mach/sram.h>
 #include <asm/div64.h>

@@ -948,13 +949,18 @@ static int __init omap2_clk_arch_init(void)
 	if (clk_set_rate(&virt_prcm_set, mpurate))
 		printk(KERN_ERR "Could not find matching MPU rate\n");
 #endif
+	if (clk_set_rate(&dpll1_ck, mpurate))
+		printk(KERN_ERR "*** Unable to set MPU rate\n");
+	omap3_dpll_recalc(&dpll1_ck);
 
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
+	printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
 	       "%ld.%01ld/%ld/%ld MHz\n",
-	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
-	       (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
+	       (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
+	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
+
+	calibrate_delay();
 
 	return 0;
 }

@@ -1013,7 +1019,7 @@ int __init omap2_clk_init(void)
 
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
+	printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
 	       "%ld.%01ld/%ld/%ld MHz\n",
 	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
 	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
Signature · 1 line
1.6.2.2
maintainer
#1 lore raw
Quoted 2 lines · Sanjeev Premi

The argument 'mpurate' had no effect on the MPU
frequency. This patch fixes the same.

Thanks, I'll plan to squeeze this into the .32 merge window, with a couple of minor changes described below. Please review the changes:

Quoted 19 lines
Signed-off-by Sanjeev Premi <[email protected]>
---
 arch/arm/mach-omap2/clock34xx.c |   14 ++++++++++----
 1 files changed, 10 insertions(+), 4 deletions(-)
arch/arm/mach-omap2/clock34xx.c +1 -0
index 045da92..0c62aad 100644
@@ -27,6 +27,7 @@
 #include <linux/limits.h>
 #include <linux/bitops.h>
 
+#include <mach/cpu.h>
 #include <mach/clock.h>
 #include <mach/sram.h>
 #include <asm/div64.h>

arch/arm/mach-omap2/clock34xx.c static int __init omap2_clk_arch_init(void) · line 951

Quoted 3 lines
arch/arm/mach-omap2/clock34xx.c +0 -0
@@ -948,13 +949,18 @@ static int __init omap2_clk_arch_init(void)
 	if (clk_set_rate(&virt_prcm_set, mpurate))
 		printk(KERN_ERR "Could not find matching MPU rate\n");
 #endif

The previous four lines (including the three above) have been removed from clock34xx.c.

arch/arm/mach-omap2/clock34xx.c static int __init omap2_clk_arch_init(void) · line 954

Quoted 3 lines
arch/arm/mach-omap2/clock34xx.c +3 -0
+	if (clk_set_rate(&dpll1_ck, mpurate))
+		printk(KERN_ERR "*** Unable to set MPU rate\n");
+	omap3_dpll_recalc(&dpll1_ck);

I dropped the omap3_dpll_recalc(&dpll1_ck); since the following recalculate_root_clocks() should handle this.

Quoted 26 lines
arch/arm/mach-omap2/clock34xx.c +6 -4
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
+	printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
 	       "%ld.%01ld/%ld/%ld MHz\n",
-	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
-	       (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
+	       (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
+	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
+
+	calibrate_delay();
 
 	return 0;
 }

@@ -1013,7 +1019,7 @@ int __init omap2_clk_init(void)
 
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
+	printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
 	       "%ld.%01ld/%ld/%ld MHz\n",
 	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
 	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
Signature · 1 line
1.6.2.2

- Paul

author
#2 lore raw
Quoted 31 lines

-----Original Message-----
From: Paul Walmsley [mailto:[email protected]]
Sent: Monday, August 10, 2009 10:52 PM
To: Premi, Sanjeev
Cc: [email protected]
Subject: Re: [PATCH] Fixed processing of bootarg 'mpurate'

Quoted 2 lines · Sanjeev Premi

The argument 'mpurate' had no effect on the MPU
frequency. This patch fixes the same.

Thanks, I'll plan to squeeze this into the .32 merge window, with a couple
of minor changes described below. Please review the changes:

Review

Quoted 7 lines
Signed-off-by Sanjeev Premi <[email protected]>
---
 arch/arm/mach-omap2/clock34xx.c |   14 ++++++++++----
 1 files changed, 10 insertions(+), 4 deletions(-)
(quoted diff) +0 -0

b/arch/arm/mach-omap2/clock34xx.c

Quoted 7 lines

index 045da92..0c62aad 100644

arch/arm/mach-omap2/clock34xx.c +0 -0
@@ -27,6 +27,7 @@
 #include <linux/limits.h>
 #include <linux/bitops.h>
Quoted 12 lines

arch/arm/mach-omap2/clock34xx.c static int __init omap2_clk_arch_init(void) · line 951

Quoted 8 lines
arch/arm/mach-omap2/clock34xx.c +1 -0
+#include <mach/cpu.h>
 #include <mach/clock.h>
 #include <mach/sram.h>
 #include <asm/div64.h>

@@ -948,13 +949,18 @@ static int __init omap2_clk_arch_init(void)
 	if (clk_set_rate(&virt_prcm_set, mpurate))
 		printk(KERN_ERR "Could not find matching MPU rate\n");
 #endif

The previous four lines (including the three above) have been removed from
clock34xx.c.

[sp] That is fine.

Quoted 7 lines

arch/arm/mach-omap2/clock34xx.c static int __init omap2_clk_arch_init(void) · line 954

Quoted 4 lines
arch/arm/mach-omap2/clock34xx.c +3 -0
+	if (clk_set_rate(&dpll1_ck, mpurate))
+		printk(KERN_ERR "*** Unable to set MPU rate\n");
+	omap3_dpll_recalc(&dpll1_ck);

I dropped the omap3_dpll_recalc(&dpll1_ck); since the following recalculate_root_clocks() should handle this.

[sp] Fine here too.

Quoted 37 lines

arch/arm/mach-omap2/clock34xx.c static int __init omap2_clk_arch_init(void)

Quoted 4 lines
arch/arm/mach-omap2/clock34xx.c +0 -1
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Switched to new clocking rate

(Crystal/DPLL3/MPU): "

arch/arm/mach-omap2/clock34xx.c static int __init omap2_clk_arch_init(void) · line 957

Quoted 1 line
arch/arm/mach-omap2/clock34xx.c +1 -0
+	printk(KERN_INFO "Switched to new clocking rate

(Crystal/Core/MPU): "

arch/arm/mach-omap2/clock34xx.c static int __init omap2_clk_arch_init(void) · line 955

Quoted 2 lines
arch/arm/mach-omap2/clock34xx.c +0 -1
 	       "%ld.%01ld/%ld/%ld MHz\n",
-	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate /

100000) % 10,

arch/arm/mach-omap2/clock34xx.c static int __init omap2_clk_arch_init(void) · line 959

Quoted 2 lines
arch/arm/mach-omap2/clock34xx.c +1 -1
-	       (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
+	       (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate /

100000) % 10),

Quoted 7 lines
arch/arm/mach-omap2/clock34xx.c +3 -0
+	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
+
+	calibrate_delay();
 
 	return 0;
 }

arch/arm/mach-omap2/clock34xx.c int __init omap2_clk_init(void) · line 1024

Quoted 7 lines
arch/arm/mach-omap2/clock34xx.c +1 -1
@@ -1013,7 +1019,7 @@ int __init omap2_clk_init(void)
 
 	recalculate_root_clocks();
 
-	printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
+	printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
 	       "%ld.%01ld/%ld/%ld MHz\n",
 	       (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate /

100000) % 10,

Quoted 4 lines
arch/arm/mach-omap2/clock34xx.c +0 -0
 	       (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
Signature · 1 line
1.6.2.2

- Paul