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lpfc 8.3.6 : Hardware related fixes and changes

PATCH New James Smart 1 participant 1 message Nov 18, 2009

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PATCH 5/6 lpfc 8.3.6 : Hardware related fixes and changes

Hardware related Fixes and Changes.
- Added new Adapter IDs and update default Adapter names.
- Added PCI read after EQarm doorbell PCI write to flush the write and avoid spurrious interrupts when in INTx mode.
- Phase out use of ONLINE registers.
- Fix for lost MSI interrupt

---

 drivers/scsi/lpfc/lpfc_hw.h   |    3 +-
 drivers/scsi/lpfc/lpfc_hw4.h  |    4 +-
 drivers/scsi/lpfc/lpfc_init.c |  170 ++++++++++++++++++++++------------------
 drivers/scsi/lpfc/lpfc_sli.c  |   55 ++++++++-----
 drivers/scsi/lpfc/lpfc_sli4.h |    7 +-
 5 files changed, 134 insertions(+), 105 deletions(-)
drivers/scsi/lpfc/lpfc_hw.h +2 -1
index f279d19..c9faa1d 100644
@@ -1168,7 +1168,8 @@ typedef struct {
 #define PCI_DEVICE_ID_ZEPHYR_DCSP   0xfe12
 #define PCI_VENDOR_ID_SERVERENGINE  0x19a2
 #define PCI_DEVICE_ID_TIGERSHARK    0x0704
-#define PCI_DEVICE_ID_TS_BE3        0x0714
+#define PCI_DEVICE_ID_TOMCAT        0x0714
+#define PCI_DEVICE_ID_FALCON        0xf180
 
 #define JEDEC_ID_ADDRESS            0x0080001c
 #define FIREFLY_JEDEC_ID            0x1ACC
drivers/scsi/lpfc/lpfc_hw4.h +2 -2
index fa33063..1585148 100644
@@ -514,8 +514,8 @@ struct lpfc_register {
 
 #define LPFC_UERR_STATUS_HI		0x00A4
 #define LPFC_UERR_STATUS_LO		0x00A0
-#define LPFC_ONLINE0			0x00B0
-#define LPFC_ONLINE1			0x00B4
+#define LPFC_UE_MASK_HI			0x00AC
+#define LPFC_UE_MASK_LO			0x00A8
 #define LPFC_SCRATCHPAD			0x0058
 
 /* BAR0 Registers */
drivers/scsi/lpfc/lpfc_init.c +93 -77

308 lines not on this page · raw message

drivers/scsi/lpfc/lpfc_sli.c +33 -22

98 lines not on this page · raw message

drivers/scsi/lpfc/lpfc_sli4.h +4 -3
index 6a4558b..25d66d0 100644
@@ -293,9 +293,8 @@ struct lpfc_sli4_hba {
 	/* BAR0 PCI config space register memory map */
 	void __iomem *UERRLOregaddr; /* Address to UERR_STATUS_LO register */
 	void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */
-	void __iomem *ONLINE0regaddr; /* Address to components of internal UE */
-	void __iomem *ONLINE1regaddr; /* Address to components of internal UE */
-#define LPFC_ONLINE_NERR	0xFFFFFFFF
+	void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */
+	void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */
 	void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */
 	/* BAR1 FCoE function CSR register memory map */
 	void __iomem *STAregaddr;    /* Address to HST_STATE register */
@@ -309,6 +308,8 @@ struct lpfc_sli4_hba {
 	void __iomem *MQDBregaddr;   /* Address to MQ_DOORBELL register */
 	void __iomem *BMBXregaddr;   /* Address to BootStrap MBX register */
 
+	uint32_t ue_mask_lo;
+	uint32_t ue_mask_hi;
 	struct msix_entry *msix_entries;
 	uint32_t cfg_eqn;
 	struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */
Signature · 1 line
1.6.0.6