Skip to contentSkip to conversation

x86, MCE, fix MSR_IA32_MCI_CTL2 CMCI threshold setup

PATCH In review Huang Ying 1 participant 2 messages Jun 8, 2010 – Jun 11, 2010 x86

lore
Share & tools
lore

Huang Ying

author
#0 lore raw

PATCH 2/2 x86, MCE, fix MSR_IA32_MCI_CTL2 CMCI threshold setup

It is reported that CMCI is not raised when number of corrected error reaches preset threshold. After inspection, it is found that MSR_IA32_MCI_CTL2 threshold field is not setup properly. This patch fixed it.

Value of MCI_CTL2_CMCI_THRESHOLD_MASK is fixed according to x86_64 Software Developer's Manual too.

Reported-by Shaohui Zheng <[email protected]>
Signed-off-by Huang Ying <[email protected]>
Reviewed-by Hidetoshi Seto <[email protected]>
---
 arch/x86/include/asm/mce.h             |    2 +-
 arch/x86/kernel/cpu/mcheck/mce_intel.c |    1 +
 2 files changed, 2 insertions(+), 1 deletion(-)
arch/x86/include/asm/mce.h +1 -1
@@ -40,7 +40,7 @@
 
 /* CTL2 register defines */
 #define MCI_CTL2_CMCI_EN		(1ULL << 30)
-#define MCI_CTL2_CMCI_THRESHOLD_MASK	0xffffULL
+#define MCI_CTL2_CMCI_THRESHOLD_MASK	0x7fffULL
 
 #define MCJ_CTX_MASK		3
 #define MCJ_CTX(flags)		((flags) & MCJ_CTX_MASK)
arch/x86/kernel/cpu/mcheck/mce_intel.c +1 -0
@@ -102,6 +102,7 @@ static void cmci_discover(int banks, int
 			continue;
 		}
 
+		val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK;
 		val |= MCI_CTL2_CMCI_EN | CMCI_THRESHOLD;
 		wrmsrl(MSR_IA32_MCx_CTL2(i), val);
 		rdmsrl(MSR_IA32_MCx_CTL2(i), val);
author
#1 lore raw

[tip:x86/mce] x86, mce: Fix MSR_IA32_MCI_CTL2 CMCI threshold setup

Commit-ID:  3c417588603e5411f29d22a40f3b5ff71529a4f0
Gitweb:     http://git.kernel.org/tip/3c417588603e5411f29d22a40f3b5ff71529a4f0
Author:     Huang Ying <[email protected]>
AuthorDate: Tue, 8 Jun 2010 14:09:10 +0800
Committer:  H. Peter Anvin <[email protected]>
CommitDate: Thu, 10 Jun 2010 21:27:36 -0700

x86, mce: Fix MSR_IA32_MCI_CTL2 CMCI threshold setup

It is reported that CMCI is not raised when number of corrected error reaches preset threshold. After inspection, it is found that MSR_IA32_MCI_CTL2 threshold field is not setup properly. This patch fixed it.

Value of MCI_CTL2_CMCI_THRESHOLD_MASK is fixed according to x86_64 Software Developer's Manual too.

Reported-by Shaohui Zheng <[email protected]>
Signed-off-by Huang Ying <[email protected]>

LKML-Reference: <[email protected]>

Reviewed-by Hidetoshi Seto <[email protected]>
Signed-off-by H. Peter Anvin <[email protected]>
---
 arch/x86/include/asm/mce.h             |    2 +-
 arch/x86/kernel/cpu/mcheck/mce_intel.c |    1 +
 2 files changed, 2 insertions(+), 1 deletions(-)
arch/x86/include/asm/mce.h +1 -1
index 82db1d8..c62c13c 100644
@@ -40,7 +40,7 @@
 
 /* CTL2 register defines */
 #define MCI_CTL2_CMCI_EN		(1ULL << 30)
-#define MCI_CTL2_CMCI_THRESHOLD_MASK	0xffffULL
+#define MCI_CTL2_CMCI_THRESHOLD_MASK	0x7fffULL
 
 #define MCJ_CTX_MASK		3
 #define MCJ_CTX(flags)		((flags) & MCJ_CTX_MASK)
arch/x86/kernel/cpu/mcheck/mce_intel.c +1 -0
index faf7b29..6fcd093 100644
@@ -102,6 +102,7 @@ static void cmci_discover(int banks, int boot)
 			continue;
 		}
 
+		val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK;
 		val |= MCI_CTL2_CMCI_EN | CMCI_THRESHOLD;
 		wrmsrl(MSR_IA32_MCx_CTL2(i), val);
 		rdmsrl(MSR_IA32_MCx_CTL2(i), val);