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ARM: kprobes: Change testcase with unpredictable STRD instruction

PATCH New Tixy 3 participants 4 messages Nov 27, 2011 – Dec 1, 2011 Arm (32-bit)

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#0 lore raw

PATCH 1/1 ARM: kprobes: Change testcase with unpredictable STRD instruction

There is a kprobes testcase for the instruction "strd r2, [r3], r4". This has unpredictable behaviour as it uses r3 for register writeback addressing and also stores it to memory.

On a cortex A9, this testcase would fail because the instruction writes the updated value of r3 to memory, whereas the kprobes emulation code writes the original value.

Fix this by changing testcase to used r5 instead of r3.

---
 arch/arm/kernel/kprobes-test-arm.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/kernel/kprobes-test-arm.c +1 -1
index fc82de8..edf9ad8 100644
@@ -550,7 +550,7 @@ void kprobe_arm_test_cases(void)
 	TEST_RPR(  "strccd	r",8, VAL2,", [r",13,0, ", r",12,48,"]")
 	TEST_RPR(  "strd	r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
 	TEST_RPR(  "strcsd	r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
-	TEST_RPR(  "strd	r",2, VAL1,", [r",3, 24,"], r",4,48,"")
+	TEST_RPR(  "strd	r",2, VAL1,", [r",5, 24,"], r",4,48,"")
 	TEST_RPR(  "strd	r",10,VAL2,", [r",9, 48,"], -r",7,24,"")
 	TEST_UNSUPPORTED(".word 0xe1afc0fa	@ strd r12, [pc, r10]!")
 
Signature · 1 line
1.7.2.5
#1 lore raw

PATCH 1/1 ARM: kprobes: Change testcase with unpredictable STRD instruction

Quoted 11 lines · Tixy

There is a kprobes testcase for the instruction "strd r2, [r3], r4". This has unpredictable behaviour as it uses r3 for register writeback addressing and also stores it to memory.

On a cortex A9, this testcase would fail because the instruction writes the updated value of r3 to memory, whereas the kprobes emulation code writes the original value.

Fix this by changing testcase to used r5 instead of r3.

Quoted 28 lines
---
 arch/arm/kernel/kprobes-test-arm.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/kernel/kprobes-test-arm.c +1 -1
index fc82de8..edf9ad8 100644
@@ -550,7 +550,7 @@ void kprobe_arm_test_cases(void)
 	TEST_RPR(  "strccd	r",8, VAL2,", [r",13,0, ", r",12,48,"]")
 	TEST_RPR(  "strd	r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
 	TEST_RPR(  "strcsd	r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
-	TEST_RPR(  "strd	r",2, VAL1,", [r",3, 24,"], r",4,48,"")
+	TEST_RPR(  "strd	r",2, VAL1,", [r",5, 24,"], r",4,48,"")
 	TEST_RPR(  "strd	r",10,VAL2,", [r",9, 48,"], -r",7,24,"")
 	TEST_UNSUPPORTED(".word 0xe1afc0fa	@ strd r12, [pc, r10]!")
 
Signature · 9 lines
1.7.2.5




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#2 lore raw

PATCH 1/1 ARM: kprobes: Change testcase with unpredictable STRD instruction

In reply to Tixy
Quoted 9 lines · Tixy

There is a kprobes testcase for the instruction "strd r2, [r3], r4". This has unpredictable behaviour as it uses r3 for register writeback addressing and also stores it to memory.

On a cortex A9, this testcase would fail because the instruction writes the updated value of r3 to memory, whereas the kprobes emulation code writes the original value.

Fix this by changing testcase to used r5 instead of r3.

Is this a -stable candidate?

author
#3 lore raw

PATCH 1/1 ARM: kprobes: Change testcase with unpredictable STRD instruction

Quoted 5 lines · Russell King - ARM Linux
Quoted 4 lines · Tixy

There is a kprobes testcase for the instruction "strd r2, [r3], r4". This has unpredictable behaviour as it uses r3 for register writeback addressing and also stores it to memory.

Quoted 7 lines
Quoted 5 lines

On a cortex A9, this testcase would fail because the instruction writes the updated value of r3 to memory, whereas the kprobes emulation code writes the original value.

Fix this by changing testcase to used r5 instead of r3.

Is this a -stable candidate?

No, the test code is new in 3.2

Signature · 1 line
Tixy