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edac: i5100 fix erroneous define for M1Err

PATCH In review Niklas Söderlund 2 participants 2 messages Feb 17, 2012 – Mar 15, 2012 EDAC-core

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Niklas Söderlund

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#0 lore raw

PATCH 1/1 edac: i5100 fix erroneous define for M1Err

According to [1] the define for M1Err in the FERR_NF_MEM register is wrong. It should be at position 1 not 0.

[1] Intel 5100 Memory Controller Hub Chipset Doc.Nr: 318378

    http://www.intel.com/content/dam/doc/datasheet/5100-
    memory-controller-hub-chipset-datasheet.pdf
Reported-by Ba Thang Nguyen <[email protected]>
Signed-off-by Niklas Söderlund <[email protected]>
---
 drivers/edac/i5100_edac.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/edac/i5100_edac.c +1 -1
index bcbdeec..ab2f906 100644
@@ -49,7 +49,7 @@
 #define		I5100_FERR_NF_MEM_M6ERR_MASK	(1 << 6)
 #define		I5100_FERR_NF_MEM_M5ERR_MASK	(1 << 5)
 #define		I5100_FERR_NF_MEM_M4ERR_MASK	(1 << 4)
-#define		I5100_FERR_NF_MEM_M1ERR_MASK	1
+#define		I5100_FERR_NF_MEM_M1ERR_MASK	(1 << 1)
 #define		I5100_FERR_NF_MEM_ANY_MASK	\
 			(I5100_FERR_NF_MEM_M16ERR_MASK | \
 			I5100_FERR_NF_MEM_M15ERR_MASK | \
Signature · 1 line
1.7.9.1
#1 lore raw

Em Fri, 17 Feb 2012 11:36:54 +0100
Niklas Söderlund <[email protected]> escreveu:

Quoted 18 lines

According to [1] the define for M1Err in the FERR_NF_MEM register is wrong. It should be at position 1 not 0.

[1] Intel 5100 Memory Controller Hub Chipset Doc.Nr: 318378

    http://www.intel.com/content/dam/doc/datasheet/5100-
    memory-controller-hub-chipset-datasheet.pdf
Reported-by Ba Thang Nguyen <[email protected]>
Signed-off-by Niklas Söderlund <[email protected]>
---
 drivers/edac/i5100_edac.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/edac/i5100_edac.c +0 -0
index bcbdeec..ab2f906 100644

drivers/edac/i5100_edac.c line 55

Quoted 8 lines
drivers/edac/i5100_edac.c +1 -1
@@ -49,7 +49,7 @@
 #define		I5100_FERR_NF_MEM_M6ERR_MASK	(1 << 6)
 #define		I5100_FERR_NF_MEM_M5ERR_MASK	(1 << 5)
 #define		I5100_FERR_NF_MEM_M4ERR_MASK	(1 << 4)
-#define		I5100_FERR_NF_MEM_M1ERR_MASK	1
+#define		I5100_FERR_NF_MEM_M1ERR_MASK	(1 << 1)
 #define		I5100_FERR_NF_MEM_ANY_MASK	\
 			(I5100_FERR_NF_MEM_M16ERR_MASK | \
 			I5100_FERR_NF_MEM_M15ERR_MASK | \

Looks fine. I'm applying on my edac -next tree, together with the other fix:

git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac.git linux-next

Cheers,
Mauro