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Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entry

PATCH New Tom Warren 3 participants 3 messages Jan 18, 2013 – Jan 22, 2013

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Arm (32-bit) Tegra architecture support
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Tom Warren

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#0 lore raw

PATCH 1/1 Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entry

Signed-off-by Tom Warren <[email protected]>
---
 arch/arm/cpu/arm720t/tegra-common/cpu.c |    7 -------
 arch/arm/include/asm/arch-tegra/tegra.h |    1 -
 2 files changed, 0 insertions(+), 8 deletions(-)
arch/arm/cpu/arm720t/tegra-common/cpu.c +0 -7
index 693d584..c32925b 100644
@@ -75,13 +75,6 @@ struct clk_pll_table tegra_pll_x_table[TEGRA_SOC_CNT][CLOCK_OSC_FREQ_COUNT] = {
 	 { 700, 6, 0, 8},
 	 { 700, 13, 0, 8},
 	},
-
-	/* TEGRA_SOC2_SLOW: 312 MHz */
-	{{ 312, 13, 0, 12},	/* OSC 13M */
-	 { 260, 16, 0, 8},	/* OSC 19.2M */
-	 { 312, 12, 0, 12},	/* OSC 12M */
-	 { 312, 26, 0, 12},	/* OSC 26M */
-	},
 };
 
 void adjust_pllp_out_freqs(void)
arch/arm/include/asm/arch-tegra/tegra.h +0 -1
index 953936c..013a3c5 100644
@@ -85,7 +85,6 @@ enum {
 	TEGRA_SOC_T20,
 	TEGRA_SOC_T25,
 	TEGRA_SOC_T30,
-	TEGRA_SOC2_SLOW,	/* T2x needs to run at slow clock initially */
 
 	TEGRA_SOC_CNT,
 	TEGRA_SOC_UNKNOWN	= -1,
Signature · 1 line
1.7.0.4
#2 lore raw

PATCH 1/1 Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entry

In reply to Tom Warren
Quoted 1 line · Tom Warren
Signed-off-by Tom Warren <[email protected]>
Acked-by Simon Glass <[email protected]>
Quoted 38 lines
---
 arch/arm/cpu/arm720t/tegra-common/cpu.c |    7 -------
 arch/arm/include/asm/arch-tegra/tegra.h |    1 -
 2 files changed, 0 insertions(+), 8 deletions(-)
arch/arm/cpu/arm720t/tegra-common/cpu.c +0 -7
index 693d584..c32925b 100644
@@ -75,13 +75,6 @@ struct clk_pll_table tegra_pll_x_table[TEGRA_SOC_CNT][CLOCK_OSC_FREQ_COUNT] = {
         { 700, 6, 0, 8},
         { 700, 13, 0, 8},
        },
-
-       /* TEGRA_SOC2_SLOW: 312 MHz */
-       {{ 312, 13, 0, 12},     /* OSC 13M */
-        { 260, 16, 0, 8},      /* OSC 19.2M */
-        { 312, 12, 0, 12},     /* OSC 12M */
-        { 312, 26, 0, 12},     /* OSC 26M */
-       },
 };
 
 void adjust_pllp_out_freqs(void)
arch/arm/include/asm/arch-tegra/tegra.h +0 -2
index 953936c..013a3c5 100644
@@ -85,7 +85,6 @@ enum {
        TEGRA_SOC_T20,
        TEGRA_SOC_T25,
        TEGRA_SOC_T30,
-       TEGRA_SOC2_SLOW,        /* T2x needs to run at slow clock initially */
 
        TEGRA_SOC_CNT,
        TEGRA_SOC_UNKNOWN       = -1,
--

1.7.0.4