socfpga: Creating driver for Reset Manager
PATCH v3 1/1 socfpga: Creating driver for Reset Manager
Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit
---
Changes for v2:
- Fixed the long subject of the patch
- Consolidated the reset_manager structure between virtual target and dev kit
Changes for v3:
- Added change log for each revision change
- Removed the < > between the date of copyright header
arch/arm/cpu/armv7/socfpga/Makefile | 2 +- arch/arm/cpu/armv7/socfpga/misc.c | 27 ----------- arch/arm/cpu/armv7/socfpga/reset_manager.c | 52 +++++++++++++++++++++ arch/arm/include/asm/arch-socfpga/reset_manager.h | 10 ++-- 4 files changed, 60 insertions(+), 31 deletions(-) create mode 100644 arch/arm/cpu/armv7/socfpga/reset_manager.c
arch/arm/cpu/armv7/socfpga/Makefile +1 -1
@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o SOBJS := lowlevel_init.o -COBJS-y := misc.o timer.o +COBJS-y := misc.o timer.o reset_manager.o COBJS-$(CONFIG_SPL_BUILD) += spl.o COBJS := $(COBJS-y)
arch/arm/cpu/armv7/socfpga/misc.c +0 -27
@@ -17,36 +17,9 @@#include <common.h> #include <asm/io.h> -#include <asm/arch/reset_manager.h> DECLARE_GLOBAL_DATA_PTR ; -static const struct socfpga_reset_manager *reset_manager_base = - (void *)SOCFPGA_RSTMGR_ADDRESS ; - -/* -* Write the reset manager register to cause reset -*/ -void reset_cpu (ulong addr) -{ -/* request a warm reset */ -writel (RSTMGR_CTRL_SWWARMRSTREQ_LSB , &reset_manager_base->ctrl); -/* -* infinite loop here as watchdog will trigger and reset -* the processor -*/ -while (1 ) - ; -} - -/* -* Release peripherals from reset based on handoff -*/ -void reset_deassert_peripherals_handoff (void ) -{ -writel (0 , &reset_manager_base->per_mod_reset); -} -int dram_init (void ) { gd->ram_size =get_ram_size ((long *)PHYS_SDRAM_1 ,PHYS_SDRAM_1_SIZE );
arch/arm/cpu/armv7/socfpga/reset_manager.c new file +52 -0
52 lines not on this page · raw message
arch/arm/include/asm/arch-socfpga/reset_manager.h +7 -3
@@ -22,16 +22,20 @@ void reset_cpu(ulong addr);void reset_deassert_peripherals_handoff (void );struct socfpga_reset_manager { -u32 padding1; +u32 status;u32 ctrl; -u32 padding2; -u32 padding3; +u32 counts; +u32 padding1;u32 mpu_mod_reset;u32 per_mod_reset;u32 per2_mod_reset;u32 brg_mod_reset; }; +#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET ) +#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2 +#else #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 +#endif #endif /* _RESET_MANAGER_H_ */
Signature · 1 line
1.7.9.5
PATCH v3 1/1 socfpga: Creating driver for Reset Manager
Dear Chin Liang See,
Quoted 3 lines · In message <[email protected]> you wrote:
Consolidating reset code into
reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit
...
arch/arm/cpu/armv7/socfpga/reset_manager.c line 2
Quoted 5 lines
arch/arm/cpu/armv7/socfpga/reset_manager.c new file +2
-0@@ -0,0 +1,52 @@ +/* +* Copyright Altera Corporation (C) 2013. All rights reserved
Please get rid of the "All rights reserved" clause.
arch/arm/cpu/armv7/socfpga/reset_manager.c line 7
Quoted 4 lines
arch/arm/cpu/armv7/socfpga/reset_manager.c new file +4
-0+* This program is free software; you can redistribute it +* and/or modify it under the terms and conditions of the +* GNU General Public License, version 2, as published by +* the Free Software Foundation.
New code for U-Boot must be released under GPLv2+, so please add the "or (at your option) any later version" clause.
Best regards,
Wolfgang Denk
Signature · 5 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Q: Do you know what the death rate around here is? A: One per person.