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m32r: remove checks for a few processor family macros

PATCH New Paul Bolle 1 participant 1 message May 20, 2014

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Paul Bolle

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PATCH 1/1 m32r: remove checks for a few processor family macros

Ever since m32r got added in v2.6.9 there have been checks for

    CONFIG_CHIP_M32310
    CONFIG_CHIP_MP
    CONFIG_CHIP_XNUX2
    CONFIG_CHIP_XNUX2_MP
    CONFIG_CHIP_XNUX_MP

But the Kconfig symbols for these processor families have never been added. Remove these checks. Also remove a header that now is not mentioned anymore (the #include involved wasn't used anyway).

Signed-off-by Paul Bolle <[email protected]>

---
Eyeball tested only!

 arch/m32r/boot/compressed/head.S     |   2 -
 arch/m32r/boot/setup.S               |   7 +-
 arch/m32r/include/asm/m32r.h         |   4 +-
 arch/m32r/include/asm/m32r_mp_fpga.h | 313 -----------------------------------
 arch/m32r/kernel/head.S              |   2 -
 arch/m32r/kernel/setup.c             |   5 +-
 arch/m32r/kernel/time.c              |   8 +-
 arch/m32r/mm/cache.c                 |   2 +-
 8 files changed, 6 insertions(+), 337 deletions(-)
 delete mode 100644 arch/m32r/include/asm/m32r_mp_fpga.h
arch/m32r/boot/compressed/head.S +0 -2
index 95a0563ff076..e2ecab840aeb 100644
@@ -73,10 +73,8 @@ startup:
 	srli	r4, #4		    ||	addi	r2, #-4
 	beqz	r4, .Lendloop1
 .Lloop1:
-#ifndef CONFIG_CHIP_M32310
 	; Touch memory for the no-write-allocating cache.
 	ld	r0, @(4,r2)
-#endif
 	st	r1, @+r2	    ||	addi	r4, #-1
 	st	r1, @+r2
 	st	r1, @+r2
arch/m32r/boot/setup.S +1 -6
index ef843d63083d..ce5049babecc 100644
@@ -62,12 +62,7 @@
 ENTRY(boot)
 
 /* Set cache mode */
-#if defined(CONFIG_CHIP_XNUX2)
-	ldi	r0, #-2              ;LDIMM	(r0, M32R_MCCR)
-	ldi	r1, #0x0101		; cache on (with invalidation)
-;	ldi	r1, #0x00		; cache off
-	sth	r1, @r0
-#elif defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_VDEC2) \
+#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_VDEC2) \
     || defined(CONFIG_CHIP_OPSP)
 	ldi	r0, #-4              ;LDIMM	(r0, M32R_MCCR)
 	ldi	r1, #0x73		; cache on (with invalidation)
arch/m32r/include/asm/m32r.h +1 -3
index 38fa946d1ebf..b12766cf2976 100644
@@ -9,9 +9,7 @@
 
 
 /* Chip type */
-#if defined(CONFIG_CHIP_XNUX_MP) || defined(CONFIG_CHIP_XNUX2_MP)
-#include <asm/m32r_mp_fpga.h>
-#elif defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
+#if defined(CONFIG_CHIP_VDEC2) \
 	|| defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
         || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
 #include <asm/m32102.h>
arch/m32r/include/asm/m32r_mp_fpga.h deleted +0 -313

313 lines not on this page · raw message

arch/m32r/kernel/head.S +0 -2
index a46652dd83e6..387f8700c91c 100644
@@ -57,10 +57,8 @@ ENTRY(_stext)
 	srli	r4, #4		    ||	addi	r2, #-4
 	beqz	r4, .Lendloop1
 .Lloop1:
-#ifndef CONFIG_CHIP_M32310
 	; Touch memory for the no-write-allocating cache.
 	ld	r0, @(4,r2)
-#endif
 	st	r1, @+r2	    ||	addi	r4, #-1
 	st	r1, @+r2
 	st	r1, @+r2
arch/m32r/kernel/setup.c +1 -4
index 4975c4555fe8..222b7d90ce79 100644
@@ -302,9 +302,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 #elif defined(CONFIG_CHIP_OPSP)
 	seq_printf(m,"cpu family\t: OPSP\n"
 		"cache size\t: I-8KB/D-8KB\n");
-#elif defined(CONFIG_CHIP_MP)
-	seq_printf(m, "cpu family\t: M32R-MP\n"
-		"cache size\t: I-xxKB/D-xxKB\n");
 #elif  defined(CONFIG_CHIP_M32104)
 	seq_printf(m,"cpu family\t: M32104\n"
 		"cache size\t: I-8KB/D-8KB\n");

@@ -377,7 +374,7 @@ unsigned long cpu_initialized __initdata = 0;
  * We reload them nevertheless, this function acts as a
  * 'CPU state barrier', nothing should get across.
  */
-#if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2)	\
+#if defined(CONFIG_CHIP_VDEC2) \
 	|| defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
 	|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
 void __init cpu_init (void)
arch/m32r/kernel/time.c +2 -6
index 1a15f81ea1bd..abf6aac647b9 100644
@@ -61,7 +61,7 @@ static u32 m32r_gettimeoffset(void)
 {
 	unsigned long  elapsed_time = 0;  /* [us] */
 
-#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
+#if defined(CONFIG_CHIP_M32102) \
 	|| defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
 	|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
 #ifndef CONFIG_SMP

@@ -96,8 +96,6 @@ static u32 m32r_gettimeoffset(void)
 	elapsed_time = DIV_ROUND_CLOSEST(count, latch);
 	/* NOTE: LATCH is equal to the "interval" value (= reload count). */
 #endif /* CONFIG_SMP */
-#elif defined(CONFIG_CHIP_M32310)
-#warning do_gettimeoffse not implemented
 #else
 #error no chip configuration
 #endif

@@ -167,7 +165,7 @@ void __init time_init(void)
 {
 	arch_gettimeoffset = m32r_gettimeoffset;
 
-#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
+#if defined(CONFIG_CHIP_M32102) \
 	|| defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
 	|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
 

@@ -191,8 +189,6 @@ void __init time_init(void)
 		outl((M32R_MFTCR_MFT2MSK|M32R_MFTCR_MFT2EN), M32R_MFTCR_PORTL);
 	}
 
-#elif defined(CONFIG_CHIP_M32310)
-#warning time_init not implemented
 #else
 #error no chip configuration
 #endif
arch/m32r/mm/cache.c +1 -1
index fac759584875..7d42a632193b 100644
@@ -8,7 +8,7 @@
 
 #undef MCCR
 
-#if defined(CONFIG_CHIP_XNUX2) || defined(CONFIG_CHIP_M32700) \
+#if defined(CONFIG_CHIP_M32700) \
 	|| defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_OPSP)
 /* Cache Control Register */
 #define MCCR		((volatile unsigned long*)0xfffffffc)
Signature · 1 line
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