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target-ppc: Altivec's mtvscr Decodes Wrong Register

PATCH Applied Tom Musta 2 participants 2 messages Nov 14, 2014 – Nov 15, 2014

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Tom Musta

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#0 lore raw

PATCH 1/1 target-ppc: Altivec's mtvscr Decodes Wrong Register

The Move to Vector Status and Control Register (mtvscr) instruction uses VRB as the source register. Fix the code generator to correctly decode the VRB field. That is, use "rB(ctx->opcode)" instead of "rD(ctx->opcode)".

---
 target-ppc/translate.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
target-ppc/translate.c +1 -1
index 910ce56..d381632 100644
@@ -6848,7 +6848,7 @@ static void gen_mtvscr(DisasContext *ctx)
         gen_exception(ctx, POWERPC_EXCP_VPU);
         return;
     }
-    p = gen_avr_ptr(rD(ctx->opcode));
+    p = gen_avr_ptr(rB(ctx->opcode));
     gen_helper_mtvscr(cpu_env, p);
     tcg_temp_free_ptr(p);
 }
Signature · 1 line
1.7.1
#1 lore raw
Quoted 6 lines · Tom Musta

The Move to Vector Status and Control Register (mtvscr) instruction uses VRB as the source register. Fix the code generator to correctly decode the VRB field. That is, use "rB(ctx->opcode)" instead of "rD(ctx->opcode)".

Thanks, applied to ppc-next (for 2.2)

Alex