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mx6sabre: Do not enable UMS with SPL

PATCH New Fabio Estevam 3 participants 6 messages Mar 9, 2015 – Mar 13, 2015

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Fabio Estevam

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#0 lore raw

PATCH 1/1 mx6sabre: Do not enable UMS with SPL

From: Fabio Estevam <[email protected]>

Since commit ad8aae82b20ac6a ("mx6sabre: Enable User Mass Storage") SPL target does not boot anymore due to the increased spl image size.

Only enable USB Mass Storage for the non-SPL target.

Signed-off-by Fabio Estevam <[email protected]>
---
 include/configs/mx6sabre_common.h | 2 ++
 1 file changed, 2 insertions(+)
include/configs/mx6sabre_common.h +2 -0
index f0e37f0..9417729 100644
@@ -278,6 +278,7 @@
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
 
+#ifndef CONFIG_SPL
 #define CONFIG_CI_UDC
 #define CONFIG_USBD_HS
 #define CONFIG_USB_GADGET_DUALSPEED

@@ -291,5 +292,6 @@
 #define CONFIG_G_DNL_VENDOR_NUM		0x0525
 #define CONFIG_G_DNL_PRODUCT_NUM	0xa4a5
 #define CONFIG_G_DNL_MANUFACTURER	"FSL"
+#endif
 
 #endif                         /* __MX6QSABRE_COMMON_CONFIG_H */
Signature · 1 line
1.9.1
#1 lore raw

PATCH 1/1 mx6sabre: Do not enable UMS with SPL

Quoted 8 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Since commit ad8aae82b20ac6a ("mx6sabre: Enable User Mass Storage") SPL target does not boot anymore due to the increased spl image size.

Only enable USB Mass Storage for the non-SPL target.

Signed-off-by Fabio Estevam <[email protected]>
Reviewed-by Tom Rini <[email protected]>

Please do a follow up commit that makes use of the existing size checks to avoid this problem in the future, thanks!

Signature · 8 lines
Tom
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#2 lore raw

PATCH 1/1 mx6sabre: Do not enable UMS with SPL

Hi Tom,

Quoted 7 lines · Tom Rini
Quoted 5 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Since commit ad8aae82b20ac6a ("mx6sabre: Enable User Mass Storage") SPL target does not boot anymore due to the increased spl image size.

Quoted 8 lines
Quoted 3 lines

Only enable USB Mass Storage for the non-SPL target.

Signed-off-by Fabio Estevam <[email protected]>
Reviewed-by Tom Rini <[email protected]>

Please do a follow up commit that makes use of the existing size checks to avoid this problem in the future, thanks!

Yes, it would be useful. Could you please point me to the existing size checks function, so that I can learn about it?

Thanks,

Fabio Estevam

#3 lore raw

PATCH 1/1 mx6sabre: Do not enable UMS with SPL

Quoted 14 lines · Fabio Estevam

Hi Tom,

Quoted 11 lines · Tom Rini
Quoted 8 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Since commit ad8aae82b20ac6a ("mx6sabre: Enable User Mass Storage") SPL target does not boot anymore due to the increased spl image size.

Only enable USB Mass Storage for the non-SPL target.

Signed-off-by Fabio Estevam <[email protected]>
Quoted 7 lines
Quoted 4 lines
Reviewed-by Tom Rini <[email protected]>

Please do a follow up commit that makes use of the existing size checks to avoid this problem in the future, thanks!

Yes, it would be useful. Could you please point me to the existing size checks function, so that I can learn about it?

CONFIG_SPL_MAX_SIZE and CONFIG_SPL_MAX_BSS_SIZE or CONFIG_SPL_MAX_FOOTPRINT are what you want for i.MX6 and documented in README. I'm not quite sure of all the details on i.MX6 right now so I can't say for sure which group it falls into. On TI ARMv7 parts for example we get access to DDR by the time we need BSS, so BSS is in DDR and our limit there is semi artificial but CONFIG_SPL_MAX_SIZE (since the binary is loaded into SRAM of a limited area) is not. On some TI Davinci platforms we use CONFIG_SPL_MAX_FOOTPRINT since both BSS and the binary must be in a limited RAM area.

Signature · 8 lines
Tom
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#4 lore raw

PATCH 1/1 mx6sabre: Do not enable UMS with SPL

Quoted 9 lines · Tom Rini

CONFIG_SPL_MAX_SIZE and CONFIG_SPL_MAX_BSS_SIZE or CONFIG_SPL_MAX_FOOTPRINT are what you want for i.MX6 and documented in README. I'm not quite sure of all the details on i.MX6 right now so I can't say for sure which group it falls into. On TI ARMv7 parts for example we get access to DDR by the time we need BSS, so BSS is in DDR and our limit there is semi artificial but CONFIG_SPL_MAX_SIZE (since the binary is loaded into SRAM of a limited area) is not. On some TI Davinci platforms we use CONFIG_SPL_MAX_FOOTPRINT since both BSS and the binary must be in a limited RAM area.

Thanks, Tom. I will take a look at these options.

Regards,

Fabio Estevam

#5 lore raw

PATCH 1/1 mx6sabre: Do not enable UMS with SPL

In reply to Fabio Estevam
Quoted 9 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Since commit ad8aae82b20ac6a ("mx6sabre: Enable User Mass Storage") SPL target does not boot anymore due to the increased spl image size.

Only enable USB Mass Storage for the non-SPL target.

Signed-off-by Fabio Estevam <[email protected]>

---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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