pwm: Add clk enable/disable for pwm_samsung_enable/pwm_samsung_disable
Subsystems (2)
PATCH 1/1 pwm: Add clk enable/disable for pwm_samsung_enable/pwm_samsung_disable
It's safe to disable the clk when we following.
pwm_config(pwm, 0, period); pwm_disable(pwm); And enable clk when we do following. pwm_config(pwm, duty, period);
pwm_enable(pwm);
Tested on OdroidXU3 Board.
--- drivers/pwm/pwm-samsung.c | 2 ++ 1 file changed, 2 insertions(+)
drivers/pwm/pwm-samsung.c +2 -0
@@ -247,6 +247,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm) tcon &= ~TCON_MANUALUPDATE (tcon_chan); tcon |=TCON_START (tcon_chan) |TCON_AUTORELOAD (tcon_chan);writel (tcon, our_chip->base +REG_TCON ); +clk_prepare_enable (our_chip->base_clk);spin_unlock_irqrestore (&samsung_pwm_lock, flags);
@@ -265,6 +266,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm) tcon =readl (our_chip->base +REG_TCON ); tcon &= ~TCON_AUTORELOAD (tcon_chan);writel (tcon, our_chip->base +REG_TCON ); +clk_disable_unprepare (our_chip->base_clk);spin_unlock_irqrestore (&samsung_pwm_lock, flags); }
Signature · 1 line
1.9.1
Quoted 13 lines · Anand Moon
drivers/pwm/pwm-samsung.c +1
-0@@ -247,6 +247,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm) tcon &= ~TCON_MANUALUPDATE (tcon_chan); tcon |=TCON_START (tcon_chan) |TCON_AUTORELOAD (tcon_chan);writel (tcon, our_chip->base +REG_TCON ); +clk_prepare_enable (our_chip->base_clk);spin_unlock_irqrestore (&samsung_pwm_lock, flags);
drivers/pwm/pwm-samsung.c static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm) · line 272
Quoted 7 lines
drivers/pwm/pwm-samsung.c +1
-0@@ -265,6 +266,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm) tcon =readl (our_chip->base +REG_TCON ); tcon &= ~TCON_AUTORELOAD (tcon_chan);writel (tcon, our_chip->base +REG_TCON ); +clk_disable_unprepare (our_chip->base_clk);spin_unlock_irqrestore (&samsung_pwm_lock, flags); }
As far as i can tell this code doesn't have any effect.
clk_enable is refcounted, so the clock will stay enabled for as long as the driver is loaded (as it's enabled in _probe). Your code above just raises and lowers the clocks enabled refcount, but won't actually ever cause it to be disabled.
With respect to trying to disabling the clocks on pwm_disable, that will need some more work to ensure the output signal has the expected level when you turn of the clock. Specifically, when disabling from a non-100% duty state the driver relies on the PWM turning the output signal low at the end of a duty cycle. However if you turn off the clock at the start of a duty cycle while the output signal is still high it will unexpectedly remain high.
Signature · 2 lines
Sjoerd Simons <[email protected]> Collabora Ltd.
hi Sjoerd,
Are you referring to handle of polarity (PWM_POLARITY_NORMAL/PWM_POLARITY_INVERSED) during enable and disable.
How can I analyses if the clock is high and low.
-Anand Moon
Quoted 41 lines · Sjoerd Simons
Quoted 13 lines · Anand Moon
drivers/pwm/pwm-samsung.c +1
-0@@ -247,6 +247,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, struct pwm_device *pwm) tcon &= ~TCON_MANUALUPDATE (tcon_chan); tcon |=TCON_START (tcon_chan) |TCON_AUTORELOAD (tcon_chan);writel (tcon, our_chip->base +REG_TCON ); +clk_prepare_enable (our_chip->base_clk);spin_unlock_irqrestore (&samsung_pwm_lock, flags);drivers/pwm/pwm-samsung.c static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm) · line 272
Quoted 7 lines
drivers/pwm/pwm-samsung.c +1
-0@@ -265,6 +266,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, struct pwm_device *pwm) tcon =readl (our_chip->base +REG_TCON ); tcon &= ~TCON_AUTORELOAD (tcon_chan);writel (tcon, our_chip->base +REG_TCON ); +clk_disable_unprepare (our_chip->base_clk);spin_unlock_irqrestore (&samsung_pwm_lock, flags); }As far as i can tell this code doesn't have any effect.
clk_enableis refcounted, so the clock will stay enabled for as long as the driver is loaded (as it's enabled in_probe). Your code above just raises and lowers the clocks enabled refcount, but won't actually ever cause it to be disabled.With respect to trying to disabling the clocks on
pwm_disable, that will need some more work to ensure the output signal has the expected level when you turn of the clock. Specifically, when disabling from a non-100% duty state the driver relies on the PWM turning the output signal low at the end of a duty cycle. However if you turn off the clock at the start of a duty cycle while the output signal is still high it will unexpectedly remain high.--
Sjoerd Simons <[email protected]>
Collabora Ltd.