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Patch "arm64: fix midr range for Cortex-A57 erratum 832075" has been added to the 3.19-stable tree

PATCH [email protected] 1 participant 1 message May 2, 2015

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This is a note to let you know that I've just added the patch titled

arm64: fix midr range for Cortex-A57 erratum 832075

to the 3.19-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:

     arm64-fix-midr-range-for-cortex-a57-erratum-832075.patch

and it can be found in the queue-3.19 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

Quoted 1 line

From 6d1966dfd6e0ad2f8aa4b664ae1a62e33abe1998 Mon Sep 17 00:00:00 2001

From: Bo Yan <[email protected]>
Date: Tue, 31 Mar 2015 21:30:48 +0100
Subject: arm64: fix midr range for Cortex-A57 erratum 832075

From: Bo Yan <[email protected]>

commit 6d1966dfd6e0ad2f8aa4b664ae1a62e33abe1998 upstream.

Register MIDR_EL1 is masked to get variant and revision fields, then compared against midr_range_min and midr_range_max when checking whether CPU is affected by any particular erratum. However, variant and revision fields in MIDR_EL1 are separated by 16 bits, so the min and max of midr range should be constructed accordingly, otherwise the patch will not be applied when variant field is non-0.

[will: use MIDR_VARIANT_SHIFT to construct upper bound]
---
 arch/arm64/kernel/cpu_errata.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm64/kernel/cpu_errata.c +2 -1
@@ -88,7 +88,8 @@ struct arm64_cpu_capabilities arm64_erra
 	/* Cortex-A57 r0p0 - r1p2 */
 		.desc = "ARM erratum 832075",
 		.capability = ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE,
-		MIDR_RANGE(MIDR_CORTEX_A57, 0x00, 0x12),
+		MIDR_RANGE(MIDR_CORTEX_A57, 0x00,
+			   (1 << MIDR_VARIANT_SHIFT) | 2),
 	},
 #endif
 	{

Patches currently in stable-queue which might be from [email protected] are

queue-3.19/arm64-fix-midr-range-for-cortex-a57-erratum-832075.patch