Patch "arm64/kvm: Fix assembler compatibility of macros" has been added to the 3.14-stable tree
Subsystems (3)
This is a note to let you know that I've just added the patch titled
arm64/kvm: Fix assembler compatibility of macros
to the 3.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-kvm-fix-assembler-compatibility-of-macros.patch
and it can be found in the queue-3.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
286fb1cc32b11c18da3573a8c8c37a4f9da16e30Mon Sep 17 00:00:00 2001
From: Geoff Levand <[email protected]>
Date: Fri, 31 Oct 2014 23:06:47 +0000
Subject: arm64/kvm: Fix assembler compatibility of macros
From: Geoff Levand <[email protected]>
commit 286fb1cc32b11c18da3573a8c8c37a4f9da16e30 upstream.
Some of the macros defined in kvm_arm.h are useful in assembly files, but are not compatible with the assembler. Change any C language integer constant definitions using appended U, UL, or ULL to the UL() preprocessor macro. Also, add a preprocessor include of the asm/memory.h file which defines the UL() macro.
Fixes build errors like these when using kvm_arm.h in assembly source files:
Error: unexpected characters following instruction at operand 3 -- `and x0,x1,#((1U<<25)-1)'
--- arch/arm64/include/asm/kvm_arm.h | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-)
arch/arm64/include/asm/kvm_arm.h +11 -10
@@ -18,6 +18,7 @@#ifndef __ARM64_KVM_ARM_H__#define __ARM64_KVM_ARM_H__ +#include <asm/memory.h> #include <asm/types.h> /* Hyp Configuration Register (HCR) bits */
@@ -162,9 +163,9 @@#endif #define VTTBR_BADDR_SHIFT (VTTBR_X - 1) -#define VTTBR_BADDR_MASK (((1LLU << (PHYS_MASK_SHIFT - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT) -#define VTTBR_VMID_SHIFT (48LLU) -#define VTTBR_VMID_MASK (0xffLLU << VTTBR_VMID_SHIFT) +#define VTTBR_BADDR_MASK (((UL(1) << (PHYS_MASK_SHIFT - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT) +#define VTTBR_VMID_SHIFT (UL(48)) +#define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)/* Hyp System Trap Register */ #define HSTR_EL2_TTEE (1 << 16)
@@ -187,13 +188,13 @@/* Exception Syndrome Register (ESR) bits */ #define ESR_EL2_EC_SHIFT (26) -#define ESR_EL2_EC (0x3fU << ESR_EL2_EC_SHIFT) -#define ESR_EL2_IL (1U << 25) +#define ESR_EL2_EC (UL(0x3f) << ESR_EL2_EC_SHIFT) +#define ESR_EL2_IL (UL(1) << 25)#define ESR_EL2_ISS (ESR_EL2_IL - 1)#define ESR_EL2_ISV_SHIFT (24) -#define ESR_EL2_ISV (1U << ESR_EL2_ISV_SHIFT) +#define ESR_EL2_ISV (UL(1) << ESR_EL2_ISV_SHIFT)#define ESR_EL2_SAS_SHIFT (22) -#define ESR_EL2_SAS (3U << ESR_EL2_SAS_SHIFT) +#define ESR_EL2_SAS (UL(3) << ESR_EL2_SAS_SHIFT)#define ESR_EL2_SSE (1 << 21)#define ESR_EL2_SRT_SHIFT (16)#define ESR_EL2_SRT_MASK (0x1f << ESR_EL2_SRT_SHIFT)
@@ -207,16 +208,16 @@#define ESR_EL2_FSC_TYPE (0x3c)#define ESR_EL2_CV_SHIFT (24) -#define ESR_EL2_CV (1U << ESR_EL2_CV_SHIFT) +#define ESR_EL2_CV (UL(1) << ESR_EL2_CV_SHIFT)#define ESR_EL2_COND_SHIFT (20) -#define ESR_EL2_COND (0xfU << ESR_EL2_COND_SHIFT) +#define ESR_EL2_COND (UL(0xf) << ESR_EL2_COND_SHIFT)#define FSC_FAULT (0x04)#define FSC_PERM (0x0c)/* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */ -#define HPFAR_MASK (~0xFUL) +#define HPFAR_MASK (~UL(0xf))#define ESR_EL2_EC_UNKNOWN (0x00)#define ESR_EL2_EC_WFI (0x01)
Patches currently in stable-queue which might be from [email protected] are
queue-3.14/arm64-kvm-fix-assembler-compatibility-of-macros.patch