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Patch "pinctrl: zynq: fix offset address for {SD0,SD1}_WP_CD_SEL" has been added to the 4.1-stable tree

PATCH [email protected] 1 participant 1 message Jul 26, 2015

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Stable branch Arm/Zynq architecture Pin control
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This is a note to let you know that I've just added the patch titled

pinctrl: zynq: fix offset address for {SD0,SD1}_WP_CD_SEL

to the 4.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
pinctrl-zynq-fix-offset-address-for-sd0-sd1-_wp_cd_sel.patch
and it can be found in the queue-4.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

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From 5cf021d52026c0e998756a3bdb475aae2e8a68a4 Mon Sep 17 00:00:00 2001

From: Masahiro Yamada <[email protected]>
Date: Wed, 20 May 2015 17:42:31 +0900
Subject: pinctrl: zynq: fix offset address for {SD0,SD1}_WP_CD_SEL
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

From: Masahiro Yamada <[email protected]>

commit 5cf021d52026c0e998756a3bdb475aae2e8a68a4 upstream.

The address for SD0_WP_CD_SEL, SD1_WP_CD_SEL is 0xf8000830, 0xf8000834, respectively.

Each offset address must be prefixed with 0x.

Fixes add958cee967 "pinctrl: Add driver for Zynq"
Signed-off-by Masahiro Yamada <[email protected]>
Reviewed-by Sören Brinkmann <[email protected]>
Signed-off-by Linus Walleij <[email protected]>
Signed-off-by Greg Kroah-Hartman <[email protected]>
---
 drivers/pinctrl/pinctrl-zynq.c |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
drivers/pinctrl/pinctrl-zynq.c +4 -4
@@ -745,15 +745,15 @@ static const struct zynq_pinmux_function
 	DEFINE_ZYNQ_PINMUX_FUNCTION(spi1, 0x50),
 	DEFINE_ZYNQ_PINMUX_FUNCTION(sdio0, 0x40),
 	DEFINE_ZYNQ_PINMUX_FUNCTION(sdio0_pc, 0xc),
-	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio0_wp, 0, 130, ZYNQ_SDIO_WP_MASK,
+	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio0_wp, 0, 0x130, ZYNQ_SDIO_WP_MASK,
 					ZYNQ_SDIO_WP_SHIFT),
-	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio0_cd, 0, 130, ZYNQ_SDIO_CD_MASK,
+	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio0_cd, 0, 0x130, ZYNQ_SDIO_CD_MASK,
 					ZYNQ_SDIO_CD_SHIFT),
 	DEFINE_ZYNQ_PINMUX_FUNCTION(sdio1, 0x40),
 	DEFINE_ZYNQ_PINMUX_FUNCTION(sdio1_pc, 0xc),
-	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio1_wp, 0, 134, ZYNQ_SDIO_WP_MASK,
+	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio1_wp, 0, 0x134, ZYNQ_SDIO_WP_MASK,
 					ZYNQ_SDIO_WP_SHIFT),
-	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio1_cd, 0, 134, ZYNQ_SDIO_CD_MASK,
+	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio1_cd, 0, 0x134, ZYNQ_SDIO_CD_MASK,
 					ZYNQ_SDIO_CD_SHIFT),
 	DEFINE_ZYNQ_PINMUX_FUNCTION(smc0_nor, 4),
 	DEFINE_ZYNQ_PINMUX_FUNCTION(smc0_nor_cs1, 8),

Patches currently in stable-queue which might be from [email protected] are

queue-4.1/pinctrl-zynq-fix-offset-address-for-sd0-sd1-_wp_cd_sel.patch queue-4.1/pinctrl-zynq-fix-define_zynq_pinmux_function_mux-macro.patch