Patch "clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_mac" has been added to the 4.1-stable tree

This is a note to let you know that I've just added the patch titled

clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_mac

to the 4.1-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
clk-rockchip-rk3288-add-clk_set_rate_parent-to-sclk_mac.patch
and it can be found in the queue-4.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.

From: Heiko Stuebner <[email protected]>
Date: Thu, 18 Jun 2015 16:18:28 +0200
Subject: clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_mac

From: Heiko Stuebner <[email protected]>

commit 4791eb61dbe8100ccac59fecfac9d93a15db1447 upstream.

The dwmac ethernet controller on the rk3288 supports phys connected via rgmii and rmii. With rgmii phys it is expected that the mac clock is provided externally while with rmii phys the clock can be external but also generated from the plls. In the later case it of course needs be at 50MHz, which gets set from the dwmac_rk driver.
As most devices use a rgmii phy it never surfaced so far that the mac clk mux, doesn't go up one lever to the pll clock in the rmii case with internal clock generation, as it is missing the CLK_SET_RATE_PARENT flag, and thus will not set the correct frequency in most cases.

---
 drivers/clk/rockchip/clk-rk3288.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

@@ -578,7 +578,7 @@ static struct rockchip_clk_branch rk3288
 	COMPOSITE(0, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0,
 			RK3288_CLKSEL_CON(21), 0, 2, MFLAGS, 8, 5, DFLAGS,
 			RK3288_CLKGATE_CON(2), 5, GFLAGS),
-	MUX(SCLK_MAC, "mac_clk", mux_mac_p, 0,
+	MUX(SCLK_MAC, "mac_clk", mux_mac_p, CLK_SET_RATE_PARENT,
 			RK3288_CLKSEL_CON(21), 4, 1, MFLAGS),
 	GATE(SCLK_MACREF_OUT, "sclk_macref_out", "mac_clk", 0,
 			RK3288_CLKGATE_CON(5), 3, GFLAGS),

Patches currently in stable-queue which might be from [email protected] are

queue-4.1/clk-rockchip-rk3288-add-clk_set_rate_parent-to-sclk_mac.patch