Patch "drm/i915: Don't use link_bw for PLL setup" has been added to the 4.2-stable tree
Subsystems (3)
This is a note to let you know that I've just added the patch titled
drm/i915: Don't use link_bw for PLL setup
to the 4.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-i915-don-t-use-link_bw-for-pll-setup.patch
and it can be found in the queue-4.2 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree, please let <[email protected]> know about it.
Quoted 1 line
From
7e6313a2516dbcd168f4ae36f0abe1a9227106b5Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <[email protected]>
Date: Tue, 11 Aug 2015 20:21:46 +0300
Subject: drm/i915: Don't use link_bw for PLL setup
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <[email protected]>
commit 7e6313a2516dbcd168f4ae36f0abe1a9227106b5 upstream.
Use port_clock instead of link_bw when picking the PLL parameters for DP. link_bw may be zero with an eDP 1.4 sink that supports DP_LINK_RATE_SET so we shouldn't use it for anything other than feed it to the sink appropriately.
v2: Fix typo in commit message (Sivakumar)
--- drivers/gpu/drm/i915/intel_ddi.c | 11 +++------ drivers/gpu/drm/i915/intel_dp.c | 44 +++++++++++++++++++-------------------- 2 files changed, 26 insertions(+), 29 deletions(-)
drivers/gpu/drm/i915/intel_ddi.c +4 -7
@@ -1293,17 +1293,14 @@ skl_ddi_pll_select(struct intel_crtc *inDPLL_CFGCR2_PDIV (wrpll_params.pdiv) | wrpll_params.central_freq; }else if (intel_encoder->type ==INTEL_OUTPUT_DISPLAYPORT ) { -struct drm_encoder *encoder = &intel_encoder->base; -struct intel_dp *intel_dp =enc_to_intel_dp (encoder); - -switch (intel_dp->link_bw) { -case DP_LINK_BW_1_62 : +switch (crtc_state->port_clock /2 ) { +case 81000 : ctrl1 |=DPLL_CTRL1_LINK_RATE (DPLL_CTRL1_LINK_RATE_810 ,0 );break ; -case DP_LINK_BW_2_7 : +case 135000 : ctrl1 |=DPLL_CTRL1_LINK_RATE (DPLL_CTRL1_LINK_RATE_1350 ,0 );break ; -case DP_LINK_BW_5_4 : +case 270000 : ctrl1 |=DPLL_CTRL1_LINK_RATE (DPLL_CTRL1_LINK_RATE_2700 ,0 );break ; }
drivers/gpu/drm/i915/intel_dp.c +22 -22
121 lines not on this page · raw message
Patches currently in stable-queue which might be from [email protected] are
queue-4.2/drm-i915-don-t-use-link_bw-for-pll-setup.patch queue-4.2/i915-set-ddi_pll_sel-in-dp-mst-path.patch